diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index f2935736014f9863f86096d8fd85259eca76250e..cf852c061b4069a3311b968008dd1533d8ee0a20 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -172,6 +172,15 @@ static inline void mmu_setup(void)
 			: : "r" (MEMORY_ATTRIBUTES) : "memory");
 	}
 #elif defined(CONFIG_CPU_V7)
+	if (is_hyp()) {
+		/* Set HTCR to disable LPAE */
+		asm volatile("mcr p15, 4, %0, c2, c0, 2"
+			: : "r" (0) : "memory");
+	} else {
+		/* Set TTBCR to disable LPAE */
+		asm volatile("mcr p15, 0, %0, c2, c0, 2"
+			: : "r" (0) : "memory");
+	}
 	/* Set TTBR0 */
 	reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK;
 #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)