diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 376851ef7aa94e42eb2b5c7fcc25d1275f1ce7a4..dc9e24dc5843d5a03ac15043135623652f9b951b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1223,6 +1223,7 @@ config ARCH_UNIPHIER select DM_RESET select DM_SERIAL select DM_USB + select OF_BOARD_SETUP select OF_CONTROL select OF_LIBFDT select PINCTRL diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 91bea776e6cb546a7225ab85497ae9c1361f6681..c1993740864c49b0b5ee98903f701143a7e1efb1 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -68,7 +68,6 @@ config ARCH_UNIPHIER_LD11 config ARCH_UNIPHIER_LD20 bool "Enable UniPhier LD20 SoC support" depends on ARCH_UNIPHIER_V8_MULTI - select OF_BOARD_SETUP default y config ARCH_UNIPHIER_PXS3 diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 269c51b85322bdb861517a4080defb4a46954554..d0c39d427379103df3a5eb6aeec9dbb5e2ffee77 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -21,6 +21,7 @@ endif obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o obj-y += pinctrl-glue.o obj-$(CONFIG_MMC) += mmc-first-dev.o +obj-y += fdt-fixup.o endif diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 8aa3f81cfc2342a2865c549469750e93bb3fc4c9..7e7c1d98db4088f1c513646d07f43344e340c8ae 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -6,8 +6,6 @@ */ #include <common.h> -#include <fdt_support.h> -#include <fdtdec.h> #include <linux/errno.h> #include <linux/kernel.h> #include <linux/printk.h> @@ -264,36 +262,3 @@ int dram_init_banksize(void) return 0; } - -#ifdef CONFIG_OF_BOARD_SETUP -/* - * The DRAM PHY requires 64 byte scratch area in each DRAM channel - * for its dynamic PHY training feature. - */ -int ft_board_setup(void *fdt, bd_t *bd) -{ - unsigned long rsv_addr; - const unsigned long rsv_size = 64; - int i, ret; - - if (uniphier_get_soc_id() != UNIPHIER_LD20_ID) - return 0; - - for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) { - if (!bd->bi_dram[i].size) - continue; - - rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size; - rsv_addr -= rsv_size; - - ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size); - if (ret) - return -ENOSPC; - - pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n", - rsv_addr, rsv_size); - } - - return 0; -} -#endif diff --git a/arch/arm/mach-uniphier/fdt-fixup.c b/arch/arm/mach-uniphier/fdt-fixup.c new file mode 100644 index 0000000000000000000000000000000000000000..022e44216efd4270d3a49221adcbba4ab5cd41cf --- /dev/null +++ b/arch/arm/mach-uniphier/fdt-fixup.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016-2018 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + */ + +#include <common.h> +#include <fdt_support.h> +#include <fdtdec.h> +#include <linux/kernel.h> +#include <linux/printk.h> + +#include "soc-info.h" + +/* + * The DRAM PHY requires 64 byte scratch area in each DRAM channel + * for its dynamic PHY training feature. + */ +static int uniphier_ld20_fdt_mem_rsv(void *fdt, bd_t *bd) +{ + unsigned long rsv_addr; + const unsigned long rsv_size = 64; + int i, ret; + + if (!IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) || + uniphier_get_soc_id() != UNIPHIER_LD20_ID) + return 0; + + for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) { + if (!bd->bi_dram[i].size) + continue; + + rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size; + rsv_addr -= rsv_size; + + ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size); + if (ret) + return -ENOSPC; + + pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n", + rsv_addr, rsv_size); + } + + return 0; +} + +int ft_board_setup(void *fdt, bd_t *bd) +{ + int ret; + + ret = uniphier_ld20_fdt_mem_rsv(fdt, bd); + if (ret) + return ret; + + return 0; +}