diff --git a/arch/arm/cpu/arm926ejs/armada100/dram.c b/arch/arm/cpu/arm926ejs/armada100/dram.c
index f3b9a66cd5aad5dcddd9499aa7906baf8188fe59..6a9000e304827dc5734cd1df94d9ad3ffc710129 100644
--- a/arch/arm/cpu/arm926ejs/armada100/dram.c
+++ b/arch/arm/cpu/arm926ejs/armada100/dram.c
@@ -108,7 +108,9 @@ int dram_init(void)
  * If this function is not defined here,
  * board.c alters dram bank zero configuration defined above.
  */
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	dram_init();
+
+	return 0;
 }
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 1e6d90c68f3806ded89aa6532e9150077e443fcf..ea6c090e0bd9fb4f9d511456d3f2ab9694263414 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -663,7 +663,7 @@ phys_size_t get_effective_memsize(void)
 	return ea_size;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
 	phys_size_t dp_ddr_size;
@@ -772,6 +772,8 @@ void dram_init_banksize(void)
 		}
 	}
 #endif
+
+	return 0;
 }
 
 #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index 305a302dfc4b9aff45e4293f03bc5bbbad177ba8..2129f37c8f68a6b03b7ccb56166c8a08b2737ecd 100644
--- a/arch/arm/include/asm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
@@ -36,7 +36,7 @@ int	arch_early_init_r(void);
 
 /* board/.../... */
 int	board_init(void);
-void	dram_init_banksize (void);
+int dram_init_banksize(void);
 void	board_quiesce_devices(void);
 
 /* cpu/.../interrupt.c */
diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c
index e699d61874976c1ead937e1e26fb2351c2e1158f..e1064e0a2f4d5abaa7d3f2c18a591856417ec739 100644
--- a/arch/arm/mach-davinci/misc.c
+++ b/arch/arm/mach-davinci/misc.c
@@ -28,10 +28,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 #endif
 
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index f159cbf849f75ab046e6f3a025bbc97c0bcfd59d..273dbeb02081f1c5005e32b9e09b3eeaaec7cae5 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -34,11 +34,13 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	/* Reserve first 16 MiB of RAM for firmware */
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + (16 * 1024 * 1024);
 	gd->bd->bi_dram[0].size = gd->ram_size - (16 * 1024 * 1024);
+
+	return 0;
 }
 
 void reset_cpu(ulong addr)
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index 8f026559c2f94d02dda4d531ddd7fcfc0668863b..1c0477a3cacd273d4b8e10f1f768a9aa17082c90 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -82,7 +82,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	const void *fdt = gd->fdt_blob;
 	const fdt32_t *val;
@@ -90,13 +90,13 @@ void dram_init_banksize(void)
 
 	val = get_memory_reg_prop(fdt, &len);
 	if (len < 0)
-		return;
+		return -ENXIO;
 
 	ac = fdt_address_cells(fdt, 0);
 	sc = fdt_size_cells(fdt, 0);
 	if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
 		printf("invalid address/size cells\n");
-		return;
+		return -ENXIO;
 	}
 
 	cells = ac + sc;
@@ -114,6 +114,8 @@ void dram_init_banksize(void)
 		      i, (unsigned long)gd->bd->bi_dram[i].start,
 		      (unsigned long)gd->bd->bi_dram[i].size);
 	}
+
+	return 0;
 }
 
 int arch_cpu_init(void)
diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c
index a8ec5ea21b6fe2e58a04be7b573ac0eef4e548b3..e3f304c36683bb67aceffc0f6bd9474fad195830 100644
--- a/arch/arm/mach-mvebu/dram.c
+++ b/arch/arm/mach-mvebu/dram.c
@@ -273,7 +273,7 @@ int dram_init(void)
  * If this function is not defined here,
  * board.c alters dram bank zero configuration defined above.
  */
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	u64 size = 0;
 	int i;
@@ -287,6 +287,8 @@ void dram_init_banksize(void)
 		if (size > SDRAM_SIZE_MAX)
 			mvebu_sdram_bs_set(i, 0x40000000);
 	}
+
+	return 0;
 }
 
 #if defined(CONFIG_ARCH_MVEBU)
diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c
index 27fa3fb4628bbfa08ff38a29386d09144e799668..3a110f2845707d14c9f5f4f7c39e6f6af1e93a9d 100644
--- a/arch/arm/mach-omap2/am33xx/emif4.c
+++ b/arch/arm/mach-omap2/am33xx/emif4.c
@@ -32,10 +32,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 
 
diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c
index a2aadc9816975e7ec00da1a8874ce4ebf414a188..d540cf08d2e710f022ab28d5d9c83df8bc479c15 100644
--- a/arch/arm/mach-omap2/omap3/emif4.c
+++ b/arch/arm/mach-omap2/omap3/emif4.c
@@ -142,7 +142,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize (void)
+int dram_init_banksize(void)
 {
 	unsigned int size0 = 0, size1 = 0;
 
@@ -153,6 +153,8 @@ void dram_init_banksize (void)
 	gd->bd->bi_dram[0].size = size0;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
 	gd->bd->bi_dram[1].size = size1;
+
+	return 0;
 }
 
 /*
diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c
index 4f15ac9cb5518f55174fb0e1bb97fb3cbd38ca1d..f64cd912ff25e4ea39e4279041e2c8183a488d40 100644
--- a/arch/arm/mach-omap2/omap3/sdrc.c
+++ b/arch/arm/mach-omap2/omap3/sdrc.c
@@ -216,7 +216,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize (void)
+int dram_init_banksize(void)
 {
 	unsigned int size0 = 0, size1 = 0;
 
@@ -227,6 +227,8 @@ void dram_init_banksize (void)
 	gd->bd->bi_dram[0].size = size0;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
 	gd->bd->bi_dram[1].size = size1;
+
+	return 0;
 }
 
 /*
diff --git a/arch/arm/mach-orion5x/dram.c b/arch/arm/mach-orion5x/dram.c
index 9ed93d25bc81cc52e6e1b2c9bbea7d57b9ba681d..e9c03f3837df5d3a4b7652956a8c85c844b886e9 100644
--- a/arch/arm/mach-orion5x/dram.c
+++ b/arch/arm/mach-orion5x/dram.c
@@ -42,7 +42,7 @@ int dram_init (void)
 	return 0;
 }
 
-void dram_init_banksize (void)
+int dram_init_banksize(void)
 {
 	int i;
 
@@ -52,4 +52,6 @@ void dram_init_banksize (void)
 			(long *) (gd->bd->bi_dram[i].start),
 			CONFIG_MAX_RAM_BANK_SIZE);
 	}
+
+	return 0;
 }
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 5a457b913e25525795bdd3e91963e040aa46218e..b73cd632e7d684ddae4db0d1296f6b2737c8cd51 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -315,7 +315,7 @@ static ulong usable_ram_size_below_4g(void)
  * start address of that bank cannot be represented in the 32-bit .size
  * field.
  */
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = usable_ram_size_below_4g();
@@ -334,6 +334,8 @@ void dram_init_banksize(void)
 		gd->bd->bi_dram[1].start = 0;
 		gd->bd->bi_dram[1].size = 0;
 	}
+
+	return 0;
 }
 
 /*
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
index 37dd8d43348ad46cc93e24bf88ed3561a4ecaca1..bf1616628b657d3dcbab8391b7c2fb43bcf97185 100644
--- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
+++ b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
@@ -72,7 +72,7 @@ int dram_init(void)
 
 extern unsigned long nvtboot_boot_x0;
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	int i;
 
@@ -80,6 +80,8 @@ void dram_init_banksize(void)
 		gd->bd->bi_dram[i].start = ram_banks[i].start;
 		gd->bd->bi_dram[i].size = ram_banks[i].size;
 	}
+
+	return 0;
 }
 
 ulong board_get_usable_ram_top(ulong total_size)
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index d9f6c16fdc2554375f82d28eb8c322ef1e32a0e6..f79b7cf3ca67e4de6aa32b1d3a122a0120bac1c3 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -232,7 +232,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	struct uniphier_dram_map dram_map[3] = {};
 	int i;
@@ -246,6 +246,8 @@ void dram_init_banksize(void)
 		gd->bd->bi_dram[i].start = dram_map[i].base;
 		gd->bd->bi_dram[i].size = dram_map[i].size;
 	}
+
+	return 0;
 }
 
 #ifdef CONFIG_OF_BOARD_SETUP
diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c
index 74736cd56c20588b375008f8c666309ca8ba9f4d..774aba63598ed819becb20219f1af5c062b76a21 100644
--- a/arch/x86/cpu/broadwell/sdram.c
+++ b/arch/x86/cpu/broadwell/sdram.c
@@ -28,9 +28,11 @@ ulong board_get_usable_ram_top(ulong total_size)
 	return mrc_common_board_get_usable_ram_top(total_size);
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	mrc_common_dram_init_banksize();
+
+	return 0;
 }
 
 void broadwell_fill_pei_data(struct pei_data *pei_data)
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index 7115e7a151f331276af7290b9692771e90ab9d2b..82407affaf10c724c1303d82e79a4bfc3d0fe760 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -104,7 +104,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	int i, j;
 
@@ -121,4 +121,6 @@ void dram_init_banksize(void)
 			}
 		}
 	}
+
+	return 0;
 }
diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c
index 51599445ab1442a5f69e9ec5feab23c35e9ffc52..413e55b596fbeb8930cbf15d38cd8c50830b40f2 100644
--- a/arch/x86/cpu/efi/sdram.c
+++ b/arch/x86/cpu/efi/sdram.c
@@ -22,8 +22,10 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = efi_get_ram_base();
 	gd->bd->bi_dram[0].size = CONFIG_EFI_RAM_SIZE;
+
+	return 0;
 }
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 201368c9c7ce36f2349eaf8f9f7ba6bb7bdc3a76..643d804e35bf1b3ddf9deb2a69a0f866a58cc0e7 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -46,9 +46,11 @@ ulong board_get_usable_ram_top(ulong total_size)
 	return mrc_common_board_get_usable_ram_top(total_size);
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	mrc_common_dram_init_banksize();
+
+	return 0;
 }
 
 static int read_seed_from_cmos(struct pei_data *pei_data)
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c
index a88d0d26547676e85736a248cc17d2d3c9a4f51e..9d84af5ef2ba20b691b32a159aacc90bf14b6249 100644
--- a/arch/x86/cpu/qemu/dram.c
+++ b/arch/x86/cpu/qemu/dram.c
@@ -26,10 +26,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = 0;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 
 /*
diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c
index 40c830af96b0f9e91d6aac25d0296c6d93bab48f..47beb86da3244e21a275a8c3b47a6f22c606edd8 100644
--- a/arch/x86/cpu/quark/dram.c
+++ b/arch/x86/cpu/quark/dram.c
@@ -162,10 +162,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = 0;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 
 /*
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index cc7fc7370ef9bec424e3fef0af758c2023324a00..33c6e2bb687afdb83be73ad71d4976aa31494000 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -41,7 +41,7 @@ void x86_disable_caches(void);
 int x86_init_cache(void);
 void reset_cpu(ulong addr);
 ulong board_get_usable_ram_top(ulong total_size);
-void dram_init_banksize(void);
+int dram_init_banksize(void);
 int default_print_cpuinfo(void);
 
 /* Set up a UART which can be used with printch(), printhex8(), etc. */
diff --git a/arch/x86/lib/efi/efi.c b/arch/x86/lib/efi/efi.c
index 533318bc360ac068d13b1542c9ff1fd387eb817a..b1746fa474ff6a00cbb29b7e79204be696e12bf8 100644
--- a/arch/x86/lib/efi/efi.c
+++ b/arch/x86/lib/efi/efi.c
@@ -92,7 +92,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	struct efi_mem_desc *desc, *end;
 	struct efi_entry_memmap *map;
@@ -103,7 +103,7 @@ void dram_init_banksize(void)
 	if (ret) {
 		/* We should have stopped in dram_init(), something is wrong */
 		debug("%s: Missing memory map\n", __func__);
-		return;
+		return -ENXIO;
 	}
 	end = (struct efi_mem_desc *)((ulong)map + size);
 	desc = map->desc;
@@ -123,6 +123,8 @@ void dram_init_banksize(void)
 			EFI_PAGE_SHIFT;
 		num_banks++;
 	}
+
+	return 0;
 }
 
 int checkcpu(void)
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index fcfe693ce5faec87e45aacec09c3f2a3d73850f3..8b880cd59455a5d1a710fe5fab63c8f6478e1f33 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -41,10 +41,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = 0;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 
 /*
diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c b/board/AndesTech/adp-ag101p/adp-ag101p.c
index 84c77f76ff86eac706c046f0529f442ef3f14801..805a266f63f425d8a549ab7388e9e4b8b9bea87b 100644
--- a/board/AndesTech/adp-ag101p/adp-ag101p.c
+++ b/board/AndesTech/adp-ag101p/adp-ag101p.c
@@ -49,12 +49,14 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
 	gd->bd->bi_dram[0].size =  PHYS_SDRAM_0_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[1].size =  PHYS_SDRAM_1_SIZE;
+
+	return 0;
 }
 
 int board_eth_init(bd_t *bd)
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index 16adf6e5ded2a596e4c3231ead8e632aeaf7ebae..1abfe889492b6bc9b3059edbace54186ffca7208 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -193,7 +193,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size  = get_ram_size((void *)PHYS_SDRAM_1,
@@ -204,6 +204,8 @@ void dram_init_banksize(void)
 					     PHYS_SDRAM_2_SIZE);
 	else
 		gd->bd->bi_dram[1].size = 0;
+
+	return 0;
 }
 
 ulong board_get_usable_ram_top(ulong total_size)
diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c
index d3b3b31924fb3848218e6cf22d5a2056cfdc0241..458f1d81483489b63e68189cafbaa55978a97e36 100644
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -109,7 +109,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size =
@@ -117,6 +117,8 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size =
 			get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+
+	return 0;
 }
 
 /*
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c
index e34af6c4d932edb93a4db7cc440e74b0edce9abc..0a224178dfdaa8e9b29099b07cf09ea78aef32b0 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -70,7 +70,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
@@ -78,6 +78,8 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
 #endif
+
+	return 0;
 }
 
 /*
diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c
index 9b3ac22e70dd1b9c0793fa80c905b29eebc76567..c5d55dc68f54d28e1c3e4c6c1d64a5efebef98f8 100644
--- a/board/beckhoff/mx53cx9020/mx53cx9020.c
+++ b/board/beckhoff/mx53cx9020/mx53cx9020.c
@@ -86,13 +86,15 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = mx53_dram_size[0];
 
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = mx53_dram_size[1];
+
+	return 0;
 }
 
 u32 get_board_rev(void)
diff --git a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
index 533e99ece681f3b3230b36a1f1bb3f8e39deffa9..5f4c634362abef66b8fd293e8b046314934e77d6 100644
--- a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
+++ b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
@@ -62,10 +62,12 @@ int dram_init(void)
 }
 
 /* This is called after dram_init() so use get_ram_size result */
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 
 #ifdef CONFIG_MMC_SDHCI_KONA
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c b/board/broadcom/bcm28155_ap/bcm28155_ap.c
index b8688129724ba59c17053c008d19aaf8f349ad98..f5b94f6430fe80f049aa8228a171a2bff9c6ca27 100644
--- a/board/broadcom/bcm28155_ap/bcm28155_ap.c
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -69,10 +69,12 @@ int dram_init(void)
 }
 
 /* This is called after dram_init() so use get_ram_size result */
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 
 #ifdef CONFIG_MMC_SDHCI_KONA
diff --git a/board/broadcom/bcm_ep/board.c b/board/broadcom/bcm_ep/board.c
index c28b203ceaac8555dd16420ff70caf7678fa9f1a..a4096227881439d1d183e8e5647af2e4e5d88d44 100644
--- a/board/broadcom/bcm_ep/board.c
+++ b/board/broadcom/bcm_ep/board.c
@@ -37,10 +37,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 
 int board_early_init_f(void)
diff --git a/board/broadcom/bcmns2/northstar2.c b/board/broadcom/bcmns2/northstar2.c
index a64431d35e583e3cc545a11f8482ef4ef2bd5079..10279a5763a35b1d0897b02de80091c3c41cd11c 100644
--- a/board/broadcom/bcmns2/northstar2.c
+++ b/board/broadcom/bcmns2/northstar2.c
@@ -43,13 +43,15 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
 	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+
+	return 0;
 }
 
 void reset_cpu(ulong addr)
diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c
index 5899aa636297e23033e1d26f9c13e762f4018324..39b9b12567706b43472969ba3a795a1b67e8f48f 100644
--- a/board/cadence/xtfpga/xtfpga.c
+++ b/board/cadence/xtfpga/xtfpga.c
@@ -48,10 +48,12 @@ int checkboard(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE);
 	gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
+
+	return 0;
 }
 
 int board_postclk_init(void)
diff --git a/board/cirrus/edb93xx/edb93xx.c b/board/cirrus/edb93xx/edb93xx.c
index 51ff16215ef41fd987fec10817cd226f63ddbf4a..720b490f2b7ba9e114e8f7a7b0a7d9cc3d0b7b09 100644
--- a/board/cirrus/edb93xx/edb93xx.c
+++ b/board/cirrus/edb93xx/edb93xx.c
@@ -216,9 +216,11 @@ static unsigned dram_init_banksize_int(int print)
 	return dram_total;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	dram_init_banksize_int(0);
+
+	return 0;
 }
 
 /* called in board_init_f (before relocation) */
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index 5b88bcce598284dcc7aff3e7a878aed5b84dfb55..80b5dc9026ab0b7ccd66c6d014d849f777dfb57c 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -688,7 +688,7 @@ int misc_init_r(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
@@ -720,6 +720,8 @@ void dram_init_banksize(void)
 		gd->bd->bi_dram[1].size = 0x7FF00000;
 		break;
 	}
+
+	return 0;
 }
 
 int dram_init(void)
diff --git a/board/denx/m53evk/m53evk.c b/board/denx/m53evk/m53evk.c
index ef63bbd10acb563802216364914035e3be4937f9..1e4db24c897a2125575d883776e8586c5ce333a4 100644
--- a/board/denx/m53evk/m53evk.c
+++ b/board/denx/m53evk/m53evk.c
@@ -59,13 +59,15 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = mx53_dram_size[0];
 
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = mx53_dram_size[1];
+
+	return 0;
 }
 
 static void setup_iomux_uart(void)
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index fe781dcc923d34747124d556c27cbcb4fc128066..19b673e6d216a289d5d4d8075331e5fee9c61039 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -132,10 +132,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+
+	return 0;
 }
 
 int board_eth_init(bd_t *bis)
diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c
index 8e8cd37b8b0ac516f54dcdff8e5979555568bd89..3bf2e49762902c4cabe2153fb350275d5c587909 100644
--- a/board/freescale/ls1021aqds/ddr.c
+++ b/board/freescale/ls1021aqds/ddr.c
@@ -184,8 +184,10 @@ int initdram(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c
index fb0ab7744567b0c80f9f20beb6d02f7f44756679..123fb11f42831db24a0914117a35dc38f0eaddcc 100644
--- a/board/freescale/mx35pdk/mx35pdk.c
+++ b/board/freescale/mx35pdk/mx35pdk.c
@@ -47,13 +47,15 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+
+	return 0;
 }
 
 #define I2C_PAD_CTRL	(PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_ODE)
diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c
index a6e46b92f9f0ce783c3d6ccae62bd20eb8ad8d07..eb9f74337f70372e3398666a9af37c24dd30ca9e 100644
--- a/board/freescale/mx53ard/mx53ard.c
+++ b/board/freescale/mx53ard/mx53ard.c
@@ -32,13 +32,15 @@ int dram_init(void)
 
 	return 0;
 }
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+
+	return 0;
 }
 
 #ifdef CONFIG_NAND_MXC
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index 9e1072f4b1444e4fa66229f060a93bee3426a984..3741fa178c3a7c69ea9b3815c41f6386ba8b59dd 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -58,13 +58,15 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = mx53_dram_size[0];
 
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = mx53_dram_size[1];
+
+	return 0;
 }
 
 u32 get_board_rev(void)
diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c
index 938c611ef8c5bc91cce001f2101580490475e5c3..630d6714af71fc3e6c738268e2087564c1f6e706 100644
--- a/board/freescale/mx53smd/mx53smd.c
+++ b/board/freescale/mx53smd/mx53smd.c
@@ -30,13 +30,15 @@ int dram_init(void)
 
 	return 0;
 }
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+
+	return 0;
 }
 
 #define UART_PAD_CTRL	(PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
index df3b5e717ac97b263e04e594fbc61ed3f0a6daf2..0f0eb3acb8bd4eb9fde7b328e57aea37432e3e0d 100644
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@@ -410,7 +410,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	/*
 	 * Reserve regions below from DT memory node (which gets generated
@@ -442,6 +442,8 @@ void dram_init_banksize(void)
 
 	gd->bd->bi_dram[5].start = 0x22000000;
 	gd->bd->bi_dram[5].size = 0x1c000000;
+
+	return 0;
 }
 
 void reset_cpu(ulong addr)
diff --git a/board/mini-box/picosam9g45/picosam9g45.c b/board/mini-box/picosam9g45/picosam9g45.c
index 32ba9c622590b959b8721e2ef2988d680268d7d1..5eb2ad77ca98a7acec2c49663566a65a11d17ebd 100644
--- a/board/mini-box/picosam9g45/picosam9g45.c
+++ b/board/mini-box/picosam9g45/picosam9g45.c
@@ -283,7 +283,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
@@ -291,6 +291,8 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
 							PHYS_SDRAM_2_SIZE);
+
+	return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 818ae04dfd015c2c0d6c1b9ed0e4c1db9bd4a1b5..e923ddc2e27f755775aff85dc67f406409c49d31 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -19,10 +19,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
 }
 
 
diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c
index 7e70f381c9efdb6f6b5c68cebbf2b4890f1eb02b..a7895cb251417e8813e7eab0d6616299e7d8a961 100644
--- a/board/rockchip/evb_rk3328/evb-rk3328.c
+++ b/board/rockchip/evb_rk3328/evb-rk3328.c
@@ -22,11 +22,13 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = 0x200000;
 	gd->bd->bi_dram[0].size = 0x7e000000;
+
+	return 0;
 }
 
 int usb_gadget_handle_interrupts(void)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index c437f1be0b328444665ad19d62b36db149ebd786..362fa0bc6e27c097524254c7baee084f4b38f170 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -67,9 +67,11 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = 0x200000;
 	gd->bd->bi_dram[0].size = 0x7e000000;
+
+	return 0;
 }
diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c
index e2cb94ee13b2e8be6881edd1becff8a3edf56614..79073d8aaaf15191ac430d6dbcb9397fed589712 100644
--- a/board/ronetix/pm9261/pm9261.c
+++ b/board/ronetix/pm9261/pm9261.c
@@ -264,10 +264,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+
+	return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index e9f9b67b77dc83983d31f332de17430d4cbc8e9e..accf16f1519501f54162480b8fc789aecbed5075 100644
--- a/board/ronetix/pm9263/pm9263.c
+++ b/board/ronetix/pm9263/pm9263.c
@@ -360,10 +360,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+
+	return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
index c2707e0015ddd433e5f806fecc1b50c55c96fc1a..c1225800a9bc3e91ac48f4474b1ed93ba104c1e3 100644
--- a/board/ronetix/pm9g45/pm9g45.c
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -144,10 +144,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+
+	return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 881d080522563912da43a96e90a7a66a6fa4866a..405ed3b9231da9381c9ab3611c0d6d41cfb32383 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -55,7 +55,7 @@ int power_init_board(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	int i;
 	u32 addr, size;
@@ -67,6 +67,8 @@ void dram_init_banksize(void)
 		gd->bd->bi_dram[i].start = addr;
 		gd->bd->bi_dram[i].size = size;
 	}
+
+	return 0;
 }
 
 #ifdef CONFIG_GENERIC_MMC
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index ba928e0fa799f280afb651078c1caa3b1efb365f..49e4db2de95080779619e2782c7ce6c0b9df9a5f 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -108,7 +108,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	unsigned int i;
 	unsigned long addr, size;
@@ -120,6 +120,8 @@ void dram_init_banksize(void)
 		gd->bd->bi_dram[i].start = addr;
 		gd->bd->bi_dram[i].size = size;
 	}
+
+	return 0;
 }
 
 static int board_uart_init(void)
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 9c48d71a6748fbf48f5a88911303327680d5a667..35ed398df698476be923abebf367cfbd08bd7c07 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -52,7 +52,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
@@ -60,6 +60,8 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
 	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
 	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+
+	return 0;
 }
 
 #ifdef CONFIG_DISPLAY_BOARDINFO
diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c
index 66b6a9801f734ec1894b213a822b37ca86139419..79e127d99abff27031b82a691d24778a1810c3e0 100644
--- a/board/samsung/smdkc100/smdkc100.c
+++ b/board/samsung/smdkc100/smdkc100.c
@@ -51,10 +51,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
 }
 
 #ifdef CONFIG_DISPLAY_BOARDINFO
diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c
index fc0e8d252b75970da7a593b381824b5d6785891b..c730ac082bf4ae06c0ce8ddf4e18417af7098425 100644
--- a/board/samsung/smdkv310/smdkv310.c
+++ b/board/samsung/smdkv310/smdkv310.c
@@ -52,7 +52,7 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
@@ -66,6 +66,8 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
 	gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
 							PHYS_SDRAM_4_SIZE);
+
+	return 0;
 }
 
 int board_eth_init(bd_t *bis)
diff --git a/board/spear/common/spr_misc.c b/board/spear/common/spr_misc.c
index bc92cd6f494320e9122e2aa7277294d3ab3f80e0..d6a84dba60eb346c94830ac67378da78c27f9009 100644
--- a/board/spear/common/spr_misc.c
+++ b/board/spear/common/spr_misc.c
@@ -33,10 +33,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
 }
 
 int board_early_init_f()
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 0c06bcaa6167ca5b20e3cb6d53ce3c7dc6d75b8f..1e7d4217d3f1761d793342f5793d070895478aee 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -16,10 +16,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
 }
 
 int board_init(void)
diff --git a/board/st/stv0991/stv0991.c b/board/st/stv0991/stv0991.c
index add1ce1a79a6f54e7994e50875e01dbee1010fa3..6a19730069299ecacf8eeb7769a2da68d815170a 100644
--- a/board/st/stv0991/stv0991.c
+++ b/board/st/stv0991/stv0991.c
@@ -93,10 +93,12 @@ int dram_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
 }
 
 #ifdef CONFIG_CMD_NET
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index de6fc19cb0d6c66d8d67a13426d9f6c3dc3a39e8..ae2d59da432ef26ff47a9948b31e93e898040181 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -498,7 +498,7 @@ int board_init(void)
 	return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	u64 ram_size;
 
@@ -510,6 +510,8 @@ void dram_init_banksize(void)
 		gd->bd->bi_dram[1].start = 0x200000000;
 		gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED;
 	}
+
+	return 0;
 }
 
 int board_late_init(void)
diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c
index ccd4ec955b5b74f6d55ec95c50d2828e1b55c589..aa55ebad38112c77a164225914c4ea3e06242788 100644
--- a/board/xilinx/microblaze-generic/microblaze-generic.c
+++ b/board/xilinx/microblaze-generic/microblaze-generic.c
@@ -25,10 +25,12 @@ static int reset_pin = -1;
 
 ulong ram_base;
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = ram_base;
 	gd->bd->bi_dram[0].size = get_effective_memsize();
+
+	return 0;
 }
 
 int dram_init(void)
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 6a3cbe0a0dc4316c1630ca810d76a3da707ae94c..b2fbecf6dedd513213ae205e9a42007ebf6d678b 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -130,9 +130,11 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 }
 
 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	fdtdec_setup_memory_banksize();
+
+	return 0;
 }
 
 int dram_init(void)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 4e5871b76abb701cdd619bbfb2c475f29f86fa5e..3849b5885dfe4b4631c6cc2a5bf0fa8b85850b23 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -180,9 +180,11 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 }
 
 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	fdtdec_setup_memory_banksize();
+
+	return 0;
 }
 
 int dram_init(void)
diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c
index d3ca939238831c0b442bc2fa528a7bf2f3c9b765..e81d6ff18d9a2250703416671f5531a89e0c9fc2 100644
--- a/board/zipitz2/zipitz2.c
+++ b/board/zipitz2/zipitz2.c
@@ -69,10 +69,12 @@ void usb_board_stop(void)
 }
 #endif
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
 }
 
 #ifdef	CONFIG_CMD_MMC
diff --git a/common/board_f.c b/common/board_f.c
index 75a0fc5df0788de3f0a4df8820d5b1839416383d..1bdc744952fa67d92706f57c8873172a5adf9263 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -208,12 +208,14 @@ static int show_dram_config(void)
 	return 0;
 }
 
-__weak void dram_init_banksize(void)
+__weak int dram_init_banksize(void)
 {
 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = get_effective_memsize();
 #endif
+
+	return 0;
 }
 
 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
@@ -644,14 +646,6 @@ static int init_post(void)
 }
 #endif
 
-static int setup_dram_config(void)
-{
-	/* Ram is board specific, so move it to board code ... */
-	dram_init_banksize();
-
-	return 0;
-}
-
 static int reloc_fdt(void)
 {
 #ifndef CONFIG_OF_EMBED
@@ -891,7 +885,7 @@ static const init_fnc_t init_sequence_f[] = {
 	reserve_fdt,
 	reserve_arch,
 	reserve_stacks,
-	setup_dram_config,
+	dram_init_banksize,
 	show_dram_config,
 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 	defined(CONFIG_SH)