diff --git a/Makefile b/Makefile
index ce7b07f9d18acba0e1862d40781fca88434548ab..850c68e235c2d9ae68eaa589e99793a2c1f8b5a1 100644
--- a/Makefile
+++ b/Makefile
@@ -1733,9 +1733,13 @@ M54455EVB_i66_config :	unconfig
 	>include/config.h ; \
 	if [ "$${FLASH}" == "INTEL" ] ; then \
 		echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \
+		echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+		cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \
 		echo "... with INTEL boot..." ; \
 	else \
 		echo "#define CFG_ATMEL_BOOT"	>> $(obj)include/config.h ; \
+		echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+		cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \
 		echo "... with ATMEL boot..." ; \
 	fi; \
 	echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
diff --git a/board/freescale/m54455evb/config.mk b/board/freescale/m54455evb/config.mk
index ce014edca8fdd71563af610c37708b5317ac24f2..b42fcc94ce7de4d7b8d5c2a02ed4692c504c4e5a 100644
--- a/board/freescale/m54455evb/config.mk
+++ b/board/freescale/m54455evb/config.mk
@@ -22,4 +22,6 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c
index 243d6a4d83e9219a44646c65158fc0b83c833276..7d6d1d6231a1b1daa6be1ed33bf93c5587d4168a 100644
--- a/board/m5282evb/m5282evb.c
+++ b/board/m5282evb/m5282evb.c
@@ -89,4 +89,5 @@ long int initdram (int board_type)
 		/* Write to the SDRAM Mode Register */
 		*(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696;
 	}
+	return dramsize;
 }
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 686e2a533302af0e69feae9603c7d835625f4932..260a09abf76ffdcdd1c1a8ff4451993f9b9556bc 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -58,7 +58,7 @@ _vectors:
 .long	0x00000000		/* Flash offset is 0 until we setup CS0 */
 #if defined(CONFIG_R5200)
 .long	0x400
-#elif defined(CONFIG_M5282)
+#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
 .long	_start - TEXT_BASE
 #else
 .long	_START
@@ -177,7 +177,11 @@ _after_flashbar_copy:
 	 * therefore no VBR to set
 	 */
 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
+#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
+	move.l	#CFG_INT_FLASH_BASE, %d0
+#else
 	move.l	#CFG_FLASH_BASE, %d0
+#endif
 	movec	%d0, %VBR
 #endif
 
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index 5cc1c87cdd0bd5e6e9dbef41c3e31b9cffc3356c..61be2eac695b122d81782849e198bc8fc8cd1d37 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -131,7 +131,7 @@ _start:
 	movec	%d0, %VBR
 
 	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR0
+	movec	%d0, %RAMBAR1
 
 	/* invalidate and disable cache */
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
@@ -268,7 +268,7 @@ _int_handler:
 icache_enable:
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
 	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0
+	move.l	#(CFG_SDRAM_BASE + 0x1c000), %d0
 	movec	%d0, %ACR0			/* Enable cache */
 
 	move.l	#0x80000200, %d0		/* Setup cache mask */
diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h
index 48170e7a35a7965c2f8e1c4fa92085e249fe1b81..f5e1b646ca2e52000e1f8dd5b175e92c75869028 100644
--- a/include/configs/M5253EVBE.h
+++ b/include/configs/M5253EVBE.h
@@ -146,7 +146,7 @@
  * Please note that CFG_SDRAM_BASE _must_ start at 0
  */
 #define CFG_SDRAM_BASE		0x00000000
-#define CFG_SDRAM_SIZE		16	/* SDRAM size in MB */
+#define CFG_SDRAM_SIZE		8	/* SDRAM size in MB */
 
 #ifdef CONFIG_MONITOR_IS_IN_RAM
 #define CFG_MONITOR_BASE	0x20000
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index 3c17c1ea1465c32a6ba6db6397de4a0f99a95684..7bb9f60f7650058ff24dc1967da773a036cfc903 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -163,7 +163,7 @@
  * Please note that CFG_SDRAM_BASE _must_ start at 0
  */
 #define CFG_SDRAM_BASE		0x00000000
-#define	CFG_SDRAM_SIZE		8	/* SDRAM size in MB */
+#define	CFG_SDRAM_SIZE		16	/* SDRAM size in MB */
 #define CFG_FLASH_BASE		0xffe00000
 #define	CFG_INT_FLASH_BASE	0xf0000000
 #define CFG_INT_FLASH_ENABLE	0x21
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index d3b160505be3c766638b42e5fd5e2b0e8e81674f..47d74a3c37a3179ce75a8505121207f76a39d6e9 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -175,7 +175,7 @@
  * Please note that CFG_SDRAM_BASE _must_ start at 0
  */
 #define CFG_SDRAM_BASE		0x40000000
-#define CFG_SDRAM_SIZE		16	/* SDRAM size in MB */
+#define CFG_SDRAM_SIZE		32	/* SDRAM size in MB */
 #define CFG_SDRAM_CFG1		0x53722730
 #define CFG_SDRAM_CFG2		0x56670000
 #define CFG_SDRAM_CTRL		0xE1092000
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 6f4859c238037a1e9d8d713574d92a4b82955cc2..ba050cb7e466110c712daa22def30e308876dbb5 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -27,8 +27,8 @@
  * board/config.h - configuration options, board specific
  */
 
-#ifndef _JAMICA54455_H
-#define _JAMICA54455_H
+#ifndef _M54455EVB_H
+#define _M54455EVB_H
 
 /*
  * High Level Configuration Options
@@ -75,7 +75,7 @@
 #define CONFIG_CMD_MISC
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
-#define CONFIG_CMD_PCI
+#undef CONFIG_CMD_PCI
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO
 
@@ -129,8 +129,8 @@
 	"u-boot=u-boot.bin\0"			\
 	"load=tftp ${loadaddr) ${u-boot}\0"	\
 	"upd=run load; run prog\0"		\
-	"prog=prot off 0 2ffff;"		\
-	"era 0 2ffff;"				\
+	"prog=prot off 4000000 402ffff;"		\
+	"era 4000000 402ffff;"				\
 	"cp.b ${loadaddr} 0 ${filesize};"	\
 	"save\0"				\
 	""
@@ -174,6 +174,7 @@
 #define CFG_IMMR		CFG_MBAR
 
 /* PCI */
+#ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI		1
 
 #define CFG_PCI_MEM_BUS		0xA0000000
@@ -187,6 +188,7 @@
 #define CFG_PCI_CFG_BUS		0xB0000000
 #define CFG_PCI_CFG_PHYS	CFG_PCI_CFG_BUS
 #define CFG_PCI_CFG_SIZE	0x01000000
+#endif
 
 /* FPGA - Spartan 2 */
 /* experiment
@@ -268,8 +270,6 @@
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
  */
-#define CFG_ENV_OFFSET		0x4000
-#define CFG_ENV_SECT_SIZE	0x2000
 #define CFG_ENV_IS_IN_FLASH	1
 #define CONFIG_ENV_OVERWRITE	1
 #undef CFG_ENV_IS_EMBEDDED
@@ -278,13 +278,17 @@
  * FLASH organization
  */
 #ifdef CFG_ATMEL_BOOT
-#	define CFG_FLASH_BASE		0
+#	define CFG_FLASH_BASE		CFG_CS0_BASE	
 #	define CFG_FLASH0_BASE		CFG_CS0_BASE
 #	define CFG_FLASH1_BASE		CFG_CS1_BASE
+#	define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x4000)
+#	define CFG_ENV_SECT_SIZE	0x2000
 #else
 #	define CFG_FLASH_BASE		CFG_FLASH0_BASE
 #	define CFG_FLASH0_BASE		CFG_CS1_BASE
 #	define CFG_FLASH1_BASE		CFG_CS0_BASE
+#	define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x60000)
+#	define CFG_ENV_SECT_SIZE	0x20000
 #endif
 
 /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system
@@ -328,9 +332,9 @@
  * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
  */
 #ifdef CFG_ATMEL_BOOT
-#	define CONFIG_JFFS2_DEV		"nor0"
+#	define CONFIG_JFFS2_DEV		"nor1"
 #	define CONFIG_JFFS2_PART_SIZE	0x01000000
-#	define CONFIG_JFFS2_PART_OFFSET	CFG_FLASH1_BASE
+#	define CONFIG_JFFS2_PART_OFFSET	(CFG_FLASH1_BASE + 0x500000)
 #else
 #	define CONFIG_JFFS2_DEV		"nor0"
 #	define CONFIG_JFFS2_PART_SIZE	(0x01000000 - 0x500000)
@@ -356,20 +360,20 @@
 
 #ifdef CFG_ATMEL_BOOT
  /* Atmel Flash */
-#define CFG_CS0_BASE		0
+#define CFG_CS0_BASE		0x04000000
 #define CFG_CS0_MASK		0x00070001
 #define CFG_CS0_CTRL		0x00001140
 /* Intel Flash */
-#define CFG_CS1_BASE		0x04000000
+#define CFG_CS1_BASE		0x00000000
 #define CFG_CS1_MASK		0x01FF0001
-#define CFG_CS1_CTRL		0x003F3D60
+#define CFG_CS1_CTRL		0x00000D60
 
 #define CFG_ATMEL_BASE		CFG_CS0_BASE
 #else
 /* Intel Flash */
-#define CFG_CS0_BASE		0
+#define CFG_CS0_BASE		0x00000000
 #define CFG_CS0_MASK		0x01FF0001
-#define CFG_CS0_CTRL		0x003F3D60
+#define CFG_CS0_CTRL		0x00000D60
  /* Atmel Flash */
 #define CFG_CS1_BASE		0x04000000
 #define CFG_CS1_MASK		0x00070001
@@ -388,4 +392,4 @@
 #define CFG_CS3_MASK		0x00070001
 #define CFG_CS3_CTRL		0x00000020
 
-#endif				/* _JAMICA54455_H */
+#endif				/* _M54455EVB_H */
diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c
index bea97441b14570293dcdafbbe6fa0acbc65fa816..cc974c2d60d7dfb4f5f8aa28f47a54b01ff50e9e 100644
--- a/lib_m68k/m68k_linux.c
+++ b/lib_m68k/m68k_linux.c
@@ -26,6 +26,7 @@
 #include <image.h>
 #include <zlib.h>
 #include <bzlib.h>
+#include <watchdog.h>
 #include <environment.h>
 #include <asm/byteorder.h>
 
@@ -36,6 +37,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define LINUX_MAX_ENVS		256
 #define LINUX_MAX_ARGS		256
 
+#define CHUNKSZ			(64 * 1024)
+
 #ifdef CONFIG_SHOW_BOOT_PROGRESS
 # include <status_led.h>
 # define SHOW_BOOT_PROGRESS(arg)	show_boot_progress(arg)