diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 8e6f8e99d3d35ef5be5b9bb416c03325e567cac3..0de6234eec3fff37d05e6841885a6ceebbf2261a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -455,14 +455,14 @@ dtb-$(CONFIG_MX7) += imx7-colibri.dtb \
dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
dtb-$(CONFIG_RCAR_GEN3) += \
- r8a7795-h3ulcb.dtb \
- r8a7795-salvator-x.dtb \
- r8a7796-m3ulcb.dtb \
- r8a7796-salvator-x.dtb \
- r8a77965-salvator-x.dtb \
- r8a77970-eagle.dtb \
- r8a77990-ebisu.dtb \
- r8a77995-draak.dtb
+ r8a7795-h3ulcb-u-boot.dtb \
+ r8a7795-salvator-x-u-boot.dtb \
+ r8a7796-m3ulcb-u-boot.dtb \
+ r8a7796-salvator-x-u-boot.dtb \
+ r8a77965-salvator-x-u-boot.dtb \
+ r8a77970-eagle-u-boot.dtb \
+ r8a77990-ebisu-u-boot.dtb \
+ r8a77995-draak-u-boot.dtb
dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2l-evm.dtb \
diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts
index 8b0d24bd29237f671b13fb303a3e43d06a70247e..5e3c195d4cfae38307555af3910f864192f9934a 100644
--- a/arch/arm/dts/r8a77990-ebisu.dts
+++ b/arch/arm/dts/r8a77990-ebisu.dts
@@ -65,6 +65,10 @@
};
};
+&ehci0 {
+ status = "okay";
+};
+
&extal_clk {
clock-frequency = <48000000>;
};
@@ -101,6 +105,18 @@
function = "sdhi3";
power-source = <1800>;
};
+
+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
+ };
+};
+
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-name = "default";
+
+ status = "okay";
};
&sdhi0 {
diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi
index 6d2d5e106890c67019e02b11331f62d8d189fc79..ad20ea14cda4fd428f58080ab167f0c08ba3d3a0 100644
--- a/arch/arm/dts/r8a77990.dtsi
+++ b/arch/arm/dts/r8a77990.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77990-sysc.h>
/ {
compatible = "renesas,r8a77990";
@@ -165,6 +166,43 @@
resets = <&cpg 906>;
};
+ ohci0: usb@ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ ehci0: usb@ee080100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee080100 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ companion = <&ohci0>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ usb2_phy0: usb-phy@ee080200 {
+ compatible = "renesas,usb2-phy-r8a7790",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee080200 0 0x700>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a77990";
reg = <0 0xe6060000 0 0x508>;
diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig
index ac08d6eb12597b1119b2581a437ae217937fdd59..d82023acf342bcf4fbf62028ed455766bc11ca4f 100644
--- a/arch/arm/mach-rmobile/Kconfig
+++ b/arch/arm/mach-rmobile/Kconfig
@@ -12,6 +12,7 @@ config RCAR_GEN3
bool "Renesas ARM SoCs R-Car Gen3 (64bit)"
select ARM64
select PHY
+ select CMD_CACHE
endchoice
diff --git a/arch/arm/mach-rmobile/cpu_info-rcar.c b/arch/arm/mach-rmobile/cpu_info-rcar.c
index ccb7a32ac4386942153a47a0490cbf70a97f547b..ce9312f9d8286e434925efdbe48c164f96c42d19 100644
--- a/arch/arm/mach-rmobile/cpu_info-rcar.c
+++ b/arch/arm/mach-rmobile/cpu_info-rcar.c
@@ -11,7 +11,14 @@
#define R8A7796_REV_1_0 0x5200
#define R8A7796_REV_1_1 0x5210
-static u32 rmobile_get_prr(void);
+static u32 rmobile_get_prr(void)
+{
+#ifdef CONFIG_RCAR_GEN3
+ return readl(0xFFF00044);
+#else
+ return readl(0xFF000044);
+#endif
+}
u32 rmobile_get_cpu_type(void)
{
@@ -37,55 +44,3 @@ u32 rmobile_get_cpu_rev_fraction(void)
else
return prr & 0x0000000F;
}
-
-#if !CONFIG_IS_ENABLED(DM) || !CONFIG_IS_ENABLED(SYSCON)
-static u32 rmobile_get_prr(void)
-{
- /*
- * On RCar/RMobile Gen2 and older systems, the PRR is always
- * located at the address below. On newer systems, the PRR
- * may be located at different address, but that information
- * is obtained from DT. This code will be removed when all
- * of the older systems get converted to DM and OF control.
- */
- return readl(0xFF000044);
-}
-#else
-
-#include <dm.h>
-#include <syscon.h>
-#include <regmap.h>
-
-struct renesas_prr_priv {
- fdt_addr_t regs;
-};
-
-enum {
- PRR_RCAR,
-};
-
-static u32 rmobile_get_prr(void)
-{
- struct regmap *map;
-
- map = syscon_get_regmap_by_driver_data(PRR_RCAR);
- if (!map) {
- printf("PRR regmap failed!\n");
- hang();
- }
-
- return readl(map->ranges[0].start);
-}
-
-static const struct udevice_id renesas_prr_ids[] = {
- { .compatible = "renesas,prr", .data = PRR_RCAR },
- { }
-};
-
-U_BOOT_DRIVER(renesas_prr) = {
- .name = "renesas_prr",
- .id = UCLASS_SYSCON,
- .of_match = renesas_prr_ids,
- .flags = DM_FLAG_PRE_RELOC,
-};
-#endif
diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 852fdda843c77aacc3a9be12b1c455179c0bcd1a..8f3d3915f77c40f70fa965e693bb4c214d841bd2 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -26,48 +26,24 @@
DECLARE_GLOBAL_DATA_PTR;
-#define CPGWPCR 0xE6150904
-#define CPGWPR 0xE615090C
-
-#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
- struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
- struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
-
- /* Watchdog init */
- writel(0xA5A5A500, &rwdt->rwtcsra);
- writel(0xA5A5A500, &swdt->swtcsra);
-
- writel(0xA5A50000, CPGWPCR);
- writel(0xFFFFFFFF, CPGWPR);
}
#define GSX_MSTP112 BIT(12) /* 3DG */
-#define TMU0_MSTP125 BIT(25) /* secure */
-#define TMU1_MSTP124 BIT(24) /* non-secure */
#define SCIF2_MSTP310 BIT(10) /* SCIF2 */
#define DVFS_MSTP926 BIT(26)
#define HSUSB_MSTP704 BIT(4) /* HSUSB */
int board_early_init_f(void)
{
- /* TMU0,1 */ /* which use ? */
- mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
-
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
- mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
+ mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
return 0;
}
-/* SYSC */
-/* R/- 32 Power status register 2(3DG) */
-#define SYSC_PWRSR2 0xE6180100
-/* -/W 32 Power resume control register 2 (3DG) */
-#define SYSC_PWRONCR2 0xE618010C
-
/* HSUSB block registers */
#define HSUSB_REG_LPSTS 0xE6590102
#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
@@ -84,7 +60,7 @@ int board_init(void)
setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
/* Configure the HSUSB block */
- mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704);
+ mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
/* Choice USB0SEL */
clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
index 931741007196745a4f9e35b43df0901f4d0004ba..0e5efea19d0719c839ff925925110ee69305e309 100644
--- a/board/renesas/eagle/eagle.c
+++ b/board/renesas/eagle/eagle.c
@@ -50,17 +50,12 @@ void s_init(void)
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
}
-#define TMU0_MSTP125 BIT(25) /* secure */
-
int board_early_init_f(void)
{
/* Unlock CPG access */
writel(0xA5A5FFFF, CPGWPR);
writel(0x5A5A0000, CPGWPCR);
- /* TMU0 */
- mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
-
return 0;
}
diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c
index 248223b444bb5a75eb3a5d00988c7de553cd9a5e..5d8b79eee319e51774524c26257a2c409623e6c7 100644
--- a/board/renesas/ebisu/ebisu.c
+++ b/board/renesas/ebisu/ebisu.c
@@ -30,13 +30,8 @@ void s_init(void)
{
}
-#define TMU0_MSTP125 BIT(25) /* secure */
-
int board_early_init_f(void)
{
- /* TMU0 */
- mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
-
return 0;
}
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 00256bc1a3431b444632c75e69da5af52d4f4bdd..8b15267d7b2d476bf009cb96567963a3fe8db19b 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -27,48 +27,23 @@
DECLARE_GLOBAL_DATA_PTR;
-#define CPGWPCR 0xE6150904
-#define CPGWPR 0xE615090C
-
-#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
- struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
- struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
-
- /* Watchdog init */
- writel(0xA5A5A500, &rwdt->rwtcsra);
- writel(0xA5A5A500, &swdt->swtcsra);
-
- writel(0xA5A50000, CPGWPCR);
- writel(0xFFFFFFFF, CPGWPR);
}
-#define GSX_MSTP112 BIT(12) /* 3DG */
-#define TMU0_MSTP125 BIT(25) /* secure */
-#define TMU1_MSTP124 BIT(24) /* non-secure */
#define SCIF2_MSTP310 BIT(10) /* SCIF2 */
#define DVFS_MSTP926 BIT(26)
#define HSUSB_MSTP704 BIT(4) /* HSUSB */
int board_early_init_f(void)
{
- /* TMU0,1 */ /* which use ? */
- mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
-
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
- mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
+ mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
return 0;
}
-/* SYSC */
-/* R/- 32 Power status register 2(3DG) */
-#define SYSC_PWRSR2 0xE6180100
-/* -/W 32 Power resume control register 2 (3DG) */
-#define SYSC_PWRONCR2 0xE618010C
-
/* HSUSB block registers */
#define HSUSB_REG_LPSTS 0xE6590102
#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
@@ -78,25 +53,14 @@ int board_early_init_f(void)
int board_init(void)
{
- u32 cpu_type = rmobile_get_cpu_type();
-
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
- if (cpu_type == RMOBILE_CPU_TYPE_R8A7795) {
- /* GSX: force power and clock supply */
- writel(0x0000001F, SYSC_PWRONCR2);
- while (readl(SYSC_PWRSR2) != 0x000003E0)
- mdelay(20);
-
- mstp_clrbits_le32(MSTPSR1, SMSTPCR1, GSX_MSTP112);
- }
-
/* USB1 pull-up */
setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
/* Configure the HSUSB block */
- mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704);
+ mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
/* Choice USB0SEL */
clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index 213e869ebe66827931a5aa60408dd7b4257e1923..63550af1f0dd2cd882798520375ba0d8d9d2f959 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -26,48 +26,24 @@
DECLARE_GLOBAL_DATA_PTR;
-#define CPGWPCR 0xE6150904
-#define CPGWPR 0xE615090C
-
-#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
- struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
- struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
-
- /* Watchdog init */
- writel(0xA5A5A500, &rwdt->rwtcsra);
- writel(0xA5A5A500, &swdt->swtcsra);
-
- writel(0xA5A50000, CPGWPCR);
- writel(0xFFFFFFFF, CPGWPR);
}
#define GSX_MSTP112 BIT(12) /* 3DG */
-#define TMU0_MSTP125 BIT(25) /* secure */
-#define TMU1_MSTP124 BIT(24) /* non-secure */
#define SCIF2_MSTP310 BIT(10) /* SCIF2 */
#define DVFS_MSTP926 BIT(26)
#define HSUSB_MSTP704 BIT(4) /* HSUSB */
int board_early_init_f(void)
{
- /* TMU0,1 */ /* which use ? */
- mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
-
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
- mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
+ mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
#endif
return 0;
}
-/* SYSC */
-/* R/- 32 Power status register 2(3DG) */
-#define SYSC_PWRSR2 0xE6180100
-/* -/W 32 Power resume control register 2 (3DG) */
-#define SYSC_PWRONCR2 0xE618010C
-
/* HSUSB block registers */
#define HSUSB_REG_LPSTS 0xE6590102
#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
@@ -84,7 +60,7 @@ int board_init(void)
setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
/* Configure the HSUSB block */
- mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704);
+ mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
/* Choice USB0SEL */
clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
diff --git a/configs/r8a7795_salvator-x_defconfig b/configs/r8a7795_salvator-x_defconfig
index aae38e84a00c74e5657183d819e73c281820b8d6..87870fc59578728d61ec2564be5f6fde8f255262 100644
--- a/configs/r8a7795_salvator-x_defconfig
+++ b/configs/r8a7795_salvator-x_defconfig
@@ -8,7 +8,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
@@ -21,6 +21,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/r8a7795_ulcb_defconfig b/configs/r8a7795_ulcb_defconfig
index c341e1aaac19cd69cd6085dab01814fc41997c00..f1d150b5a0e6222399f2d0941184d679be1ae5ca 100644
--- a/configs/r8a7795_ulcb_defconfig
+++ b/configs/r8a7795_ulcb_defconfig
@@ -8,7 +8,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb"
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/r8a77965_salvator-x_defconfig b/configs/r8a77965_salvator-x_defconfig
index 567f63977e90926c78c1596087c543c21a5b7d66..72549e283669d981de7d5dd6c21937cfdbbece9b 100644
--- a/configs/r8a77965_salvator-x_defconfig
+++ b/configs/r8a77965_salvator-x_defconfig
@@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77965-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/r8a7796_salvator-x_defconfig b/configs/r8a7796_salvator-x_defconfig
index e3551a800761f6dd36e50e1b596484928bb1af73..7c39268a43f1a71cfffe24f8af407d49f71620fe 100644
--- a/configs/r8a7796_salvator-x_defconfig
+++ b/configs/r8a7796_salvator-x_defconfig
@@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/r8a7796_ulcb_defconfig b/configs/r8a7796_ulcb_defconfig
index 80862616370c4d65a5dfe42967a60b7220c91719..ef5c9443f927499363d9b4c9207daa2f26922039 100644
--- a/configs/r8a7796_ulcb_defconfig
+++ b/configs/r8a7796_ulcb_defconfig
@@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb"
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index 0cd47c1203a392239083fd6ec13f3cfb1a030b39..67ef2632a97ee02e176dd6624b174aeab937c8ca 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb"
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig
index 4f9ebad23df163d22196674070d19bd00cc7f6e3..7363310d52f5039f8f474dd6c412074dbf8e268f 100644
--- a/configs/r8a77990_ebisu_defconfig
+++ b/configs/r8a77990_ebisu_defconfig
@@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200"
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb"
CONFIG_VERSION_VARIABLE=y
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index ca89a12b7b5a71aa1d25ac5bb4cf05f47f15973f..0f1189b671b38ddd755f41e00042c73f4e1d2596 100644
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb"
CONFIG_VERSION_VARIABLE=y
diff --git a/include/configs/draak.h b/include/configs/draak.h
index 5d1da21e99e00edf25727920ee2bcee2c49da753..70c4f166a544de6f52e52fb7583843df432af63b 100644
--- a/include/configs/draak.h
+++ b/include/configs/draak.h
@@ -33,6 +33,5 @@
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_WRITE_SWAPPED_DATA
-#define CONFIG_CMD_CACHE
#endif /* __DRAAK_H */
diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h
new file mode 100644
index 0000000000000000000000000000000000000000..1409c73a57c7e0bf29d7d26236c5ec9e4f3d9343
--- /dev/null
+++ b/include/dt-bindings/power/r8a77990-sysc.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77990_PD_CA53_CPU0 5
+#define R8A77990_PD_CA53_SCU 21
+
+/* Always-on power area */
+#define R8A77990_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */