diff --git a/CHANGELOG b/CHANGELOG index 5640dfbb878d25475d709c4d81da06e976d955dd..f09948ee2e486a69d0ab6d6e9a780b9a96afa26d 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,10 @@ Changes for U-Boot 1.1.3: ====================================================================== +* Fix bug in the SDRAM initialization code for canmb, IceCube and + PM520 boards. + Fix PHY address for canmb board. + * Cleanup serial console baudrate calculation on AT91RM9200; get rid of obsolete CFG_AT91C_BRGR_DIVISOR definition diff --git a/board/canmb/canmb.c b/board/canmb/canmb.c index 3d3abf72074f7a9d632e2b194dc8abf877a46305..e84ec5aa937a710c406ee68953d93ef73396952c 100644 --- a/board/canmb/canmb.c +++ b/board/canmb/canmb.c @@ -133,10 +133,13 @@ long int initdram (int board_type) *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */ /* find RAM size using SDRAM CS1 only */ - sdram_start(0); - test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); - sdram_start(1); - test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + if (!dramsize) + sdram_start(0); + test2 = test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + if (!dramsize) { + sdram_start(1); + test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + } if (test1 > test2) { sdram_start(0); dramsize2 = test1; diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 07c25ed8ab5f8b2bb2c673ec64bb88366ec7375a..376382194206e3cfc8c99d7503041c4801774afd 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -133,10 +133,13 @@ long int initdram (int board_type) *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */ /* find RAM size using SDRAM CS1 only */ - sdram_start(0); - test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); - sdram_start(1); - test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + if (!dramsize) + sdram_start(0); + test2 = test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + if (!dramsize) { + sdram_start(1); + test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + } if (test1 > test2) { sdram_start(0); dramsize2 = test1; diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c index 54f59f59a7fb165d49060199e26a49d40b3c2292..d7a8c83436848fc847e34675b141c28d377baa63 100644 --- a/board/pm520/pm520.c +++ b/board/pm520/pm520.c @@ -133,10 +133,13 @@ long int initdram (int board_type) *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */ /* find RAM size using SDRAM CS1 only */ - sdram_start(0); - test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); - sdram_start(1); - test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + if (!dramsize) + sdram_start(0); + test2 = test1 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + if (!dramsize) { + sdram_start(1); + test2 = get_ram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + } if (test1 > test2) { sdram_start(0); dramsize2 = test1; diff --git a/cpu/mpc85xx/ether_fcc.c b/cpu/mpc85xx/ether_fcc.c index c2f88f83dd2fdc2bc64c1e1d4b53ddf9bb09edfd..122ca870c826c825d8d96c05cc2449cb7ff05eb0 100644 --- a/cpu/mpc85xx/ether_fcc.c +++ b/cpu/mpc85xx/ether_fcc.c @@ -157,7 +157,7 @@ static int fec_send(struct eth_device* dev, volatile void *packet, int length) rtx.txbd[txIdx].cbd_bufaddr = (uint)packet; rtx.txbd[txIdx].cbd_datlen = length; rtx.txbd[txIdx].cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_LAST | \ - BD_ENET_TX_TC ); + BD_ENET_TX_TC | BD_ENET_TX_PAD); for(i=0; rtx.txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) { if (i >= TOUT_LOOP) { @@ -414,7 +414,7 @@ static int fec_init(struct eth_device* dev, bd_t *bis) immr->im_cpm.im_cpm_fcc3.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR; } - return 0; + return 1; } static void fec_halt(struct eth_device* dev) diff --git a/include/configs/TQM8560.h b/include/configs/TQM8560.h index 4e395d5819bbbdfe4e4a16d9a3945d74c8924c4f..f418e2634450b375465abf979621bba0459e2a72 100644 --- a/include/configs/TQM8560.h +++ b/include/configs/TQM8560.h @@ -279,18 +279,17 @@ #define TSEC2_PHY_ADDR 1 #define TSEC2_PHYIDX 0 +#endif /* CONFIG_TSEC_ENET */ + #define CONFIG_ETHER_ON_FCC #define CONFIG_ETHER_ON_FCC3 #define CFG_CMXFCR_MASK3 (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK) -#define CFG_CMXFCR_VALUE3 (CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK14) +#define CFG_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15 | CMXFCR_TF3CS_CLK14) #define CFG_CPMFCR_RAMTYPE 0 -#define CFG_FCC_PSMR (FCC_PSMR_FDE) +#define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) #define CONFIG_ETHPRIME "ENET1" -#endif /* CONFIG_TSEC_ENET */ - - /* * Environment */ diff --git a/include/configs/canmb.h b/include/configs/canmb.h index a8bea02e56e70099834578797be072b8ce09630c..9b91d5881c2b433edd356497ea32516fd4345f82 100644 --- a/include/configs/canmb.h +++ b/include/configs/canmb.h @@ -167,7 +167,7 @@ * Ethernet configuration */ #define CONFIG_MPC5xxx_FEC 1 -#define CONFIG_PHY_ADDR 0x1 +#define CONFIG_PHY_ADDR 0x0 /* * GPIO configuration: * PSC1,2,3 predefined as UART