diff --git a/arch/mips/mach-mt7620/lowlevel_init.S b/arch/mips/mach-mt7620/lowlevel_init.S
index 1a50f160fe0fd385692ceebfd80adfea2df0ba03..aa707e0de6c409115be32b46e278813f33c7e7a0 100644
--- a/arch/mips/mach-mt7620/lowlevel_init.S
+++ b/arch/mips/mach-mt7620/lowlevel_init.S
@@ -108,6 +108,12 @@ CPLL_READY:
 	sw	t3, 0(t0)
 
 CPLL_DONE:
+	/* Reset MC */
+	lw	t2, 0x34(s0)
+	ori	t2, BIT(10)
+	sw	t2, 0x34(s0)
+	nop
+
 	/*
 	 * SDR and DDR initialization: delay 200us
 	 */