From ae00bb4b2944dc64a485ed72a19754b11af7c223 Mon Sep 17 00:00:00 2001
From: Rodolfo Giometti <giometti@enneenne.com>
Date: Mon, 26 Mar 2007 12:03:36 +0200
Subject: [PATCH] PXA: pxa27x USB OHCI support
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
---
README | 1 +
cpu/pxa/usb.c | 15 +++++++++++++--
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/README b/README
index 13ff3ffcfc6..73a3e80161e 100644
--- a/README
+++ b/README
@@ -248,6 +248,7 @@ The following options need to be configured:
CONFIG_SA1110
CONFIG_ARM7
CONFIG_PXA250
+ CONFIG_PXA27X
CONFIG_CPU_MONAHANS
MicroBlaze based CPUs:
diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c
index 5d273cb3518..4ef3ac76796 100644
--- a/cpu/pxa/usb.c
+++ b/cpu/pxa/usb.c
@@ -24,15 +24,21 @@
#include <common.h>
#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
-# ifdef CONFIG_CPU_MONAHANS
+# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
#include <asm/arch/pxa-regs.h>
int usb_cpu_init()
{
+#if defined(CONFIG_CPU_MONAHANS)
/* Enable USB host clock. */
CKENA |= (CKENA_2_USBHOST | CKENA_20_UDC);
udelay(100);
+#endif
+#if defined(CONFIG_PXA27X)
+ /* Enable USB host clock. */
+ CKEN |= CKEN10_USBHOST;
+#endif
/* Configure Port 2 for Host (USB Client Registers) */
UP2OCR = 0x3000c;
@@ -55,7 +61,12 @@ int usb_cpu_init()
UHCHR |= UHCHR_PSPL; /* USBHPWR is active low */
#endif
+#if defined(CONFIG_CPU_MONAHANS)
UHCHR &= ~UHCHR_SSEP0;
+#endif
+#if defined(CONFIG_PXA27X)
+ UHCHR &= ~UHCHR_SSEP2;
+#endif
UHCHR &= ~UHCHR_SSEP1;
UHCHR &= ~UHCHR_SSE;
@@ -74,5 +85,5 @@ int usb_cpu_init_fail()
return 0;
}
-# endif /* CONFIG_CPU_MONAHANS */
+# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) */
#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
--
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