diff --git a/arch/arm/include/asm/arch-tegra124/flow.h b/arch/arm/include/asm/arch-tegra124/flow.h
index a54425692b5717b7bf237a7a39b6c994714587ed..2b330dc9e1dd463dfe1354811fcd5080baa47076 100644
--- a/arch/arm/include/asm/arch-tegra124/flow.h
+++ b/arch/arm/include/asm/arch-tegra124/flow.h
@@ -25,12 +25,6 @@ struct flow_ctlr {
 	u32 cpu_pwr_csr;	/* offset 0x38 */
 	u32 mpid;		/* offset 0x3c */
 	u32 ram_repair;		/* offset 0x40 */
-	u32 flow_dbg_sel;	/* offset 0x44 */
-	u32 flow_dbg_cnt0;	/* offset 0x48 */
-	u32 flow_dbg_cnt1;	/* offset 0x4c */
-	u32 flow_dbg_qual;	/* offset 0x50 */
-	u32 flow_ctlr_spare;	/* offset 0x54 */
-	u32 ram_repair_cluster1;/* offset 0x58 */
 };
 
 /* HALT_COP_EVENTS_0, 0x04 */
@@ -48,10 +42,4 @@ struct flow_ctlr {
 #define CSR_WAIT_WFI_SHIFT	8
 #define CSR_PWR_OFF_STS		(1 << 16)
 
-/* RAM_REPAIR, 0x40, 0x58 */
-enum {
-	RAM_REPAIR_REQ = 0x1 << 0,
-	RAM_REPAIR_STS = 0x1 << 1,
-};
-
 #endif	/*  _TEGRA124_FLOW_H_ */
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index d32d559f13ad62b594d367127709ccf8b1d5826a..e45f0961b242cdd92c344bcd186583dc80131f5b 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -8,7 +8,7 @@
 
 #include <asm/io.h>
 #include <asm/types.h>
-#include <asm/arch/flow.h>
+
 #include <asm/arch/powergate.h>
 #include <asm/arch/tegra.h>
 
@@ -74,29 +74,11 @@ static int tegra_powergate_remove_clamping(enum tegra_powergate id)
 	return 0;
 }
 
-static void tegra_powergate_ram_repair(void)
-{
-#ifdef CONFIG_TEGRA124
-	struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE;
-
-	/* Request RAM repair for cluster 0 and wait until complete */
-	setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ);
-	while (!(readl(&flow->ram_repair) & RAM_REPAIR_STS))
-		;
-
-	/* Same for cluster 1 */
-	setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ);
-	while (!(readl(&flow->ram_repair_cluster1) & RAM_REPAIR_STS))
-		;
-#endif
-}
-
 int tegra_powergate_sequence_power_up(enum tegra_powergate id,
 				      enum periph_id periph)
 {
 	int err;
 
-	tegra_powergate_ram_repair();
 	reset_set_enable(periph, 1);
 
 	err = tegra_powergate_power_on(id);