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onny
uboot-i9100
Commits
026cb5d8
Commit
026cb5d8
authored
19 years ago
by
Stefan Roese
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esd PMC405 board updated
Patch by Matthias Fuchs, 22 Sep 2005
parent
98f4a3df
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CHANGELOG
+3
-0
3 additions, 0 deletions
CHANGELOG
board/esd/pmc405/Makefile
+1
-1
1 addition, 1 deletion
board/esd/pmc405/Makefile
board/esd/pmc405/strataflash.c
+0
-789
0 additions, 789 deletions
board/esd/pmc405/strataflash.c
include/configs/PMC405.h
+10
-7
10 additions, 7 deletions
include/configs/PMC405.h
with
14 additions
and
797 deletions
CHANGELOG
+
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−
0
View file @
026cb5d8
...
@@ -2,6 +2,9 @@
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@@ -2,6 +2,9 @@
Changes for U-Boot 1.1.4:
Changes for U-Boot 1.1.4:
======================================================================
======================================================================
* esd PMC405 board updated
Patch by Matthias Fuchs, 22 Sep 2005
* Add SM501 support to HH405 board.
* Add SM501 support to HH405 board.
Add support for gzip compressed bmp's (CONFIG_VIDEO_BMP_GZIP).
Add support for gzip compressed bmp's (CONFIG_VIDEO_BMP_GZIP).
Add support for eeprom write-enable (CFG_EEPROM_WREN).
Add support for eeprom write-enable (CFG_EEPROM_WREN).
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board/esd/pmc405/Makefile
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1
−
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026cb5d8
...
@@ -30,7 +30,7 @@ CPLD = ../common/xilinx_jtag/lenval.o \
...
@@ -30,7 +30,7 @@ CPLD = ../common/xilinx_jtag/lenval.o \
../common/xilinx_jtag/micro.o
\
../common/xilinx_jtag/micro.o
\
../common/xilinx_jtag/ports.o
../common/xilinx_jtag/ports.o
OBJS
=
$(
BOARD
)
.o
strataflash.o
../common/misc.o
$(
CPLD
)
OBJS
=
$(
BOARD
)
.o ../common/misc.o
$(
CPLD
)
$(LIB)
:
$(OBJS) $(SOBJS)
$(LIB)
:
$(OBJS) $(SOBJS)
$(
AR
)
crv
$@
$(
OBJS
)
$(
AR
)
crv
$@
$(
OBJS
)
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board/esd/pmc405/strataflash.c
deleted
100644 → 0
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0
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include/configs/PMC405.h
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10
−
7
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026cb5d8
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@@ -183,14 +183,17 @@
...
@@ -183,14 +183,17 @@
/*-----------------------------------------------------------------------
/*-----------------------------------------------------------------------
* FLASH organization
* FLASH organization
*/
*/
#define CFG_FLASH_CFI 1
/* Flash is CFI conformant */
#define CFG_MAX_FLASH_SECT 128
/* max number of sectors on one chip */
#define CFG_MAX_FLASH_BANKS 2
/* max number of memory banks */
#undef CFG_FLASH_PROTECTION
/* don't use hardware protection */
#define CFG_FLASH_USE_BUFFER_WRITE 1
/* use buffered writes (20x faster) */
#define CFG_FLASH_BASE 0xFE000000
#define CFG_FLASH_BASE 0xFE000000
#define CFG_FLASH_INCREMENT 0x01000000
#define CFG_FLASH_INCREMENT 0x01000000
#define CFG_FLASH_CFI 1
/* Flash is CFI conformant */
#define CFG_FLASH_CFI_DRIVER 1
/* Use the common driver */
#define CFG_FLASH_PROTECTION 1
/* don't use hardware protection */
#define CFG_FLASH_USE_BUFFER_WRITE 1
/* use buffered writes (20x faster) */
#define CFG_MAX_FLASH_BANKS 2
/* max num of flash banks */
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + CFG_FLASH_INCREMENT }
#define CFG_MAX_FLASH_SECT 128
/* max num of sects on one chip */
#define CFG_FLASH_EMPTY_INFO
/* print 'E' for empty sector on flinfo */
#define CFG_FLASH_EMPTY_INFO
/* print 'E' for empty sector on flinfo */
/*
/*
...
@@ -200,8 +203,8 @@
...
@@ -200,8 +203,8 @@
/* No command line, one static partition, whole device */
/* No command line, one static partition, whole device */
#undef CONFIG_JFFS2_CMDLINE
#undef CONFIG_JFFS2_CMDLINE
#define CONFIG_JFFS2_DEV "nor0"
#define CONFIG_JFFS2_DEV "nor0"
#define CONFIG_JFFS2_PART_SIZE 0x
FFFFFFFF
#define CONFIG_JFFS2_PART_SIZE 0x
01b00000
#define CONFIG_JFFS2_PART_OFFSET 0x00
0
00000
#define CONFIG_JFFS2_PART_OFFSET 0x00
4
00000
/* mtdparts command line support */
/* mtdparts command line support */
/* Note: fake mtd_id used, no linux mtd map file */
/* Note: fake mtd_id used, no linux mtd map file */
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