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Commit 22c9de06 authored by Dave Liu's avatar Dave Liu Committed by Kumar Gala
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fsl-ddr: change the default burst mode for DDR3


For 64B cacheline SoC, set the fixed 8-beat burst len,
for 32B cacheline SoC, set the On-The-Fly as default.

Signed-off-by: default avatarDave Liu <daveliu@freescale.com>
parent ec145e87
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