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Commit 2fa77bd1 authored by Jerome Brunet's avatar Jerome Brunet Committed by Tom Rini
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clk: meson: fix clk81 divider calculation


clk81 divider is 0 based (meaning that 0 value in the register means
divide by 1). Fix clk81 rate calculation for this.

Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
parent 61927d28
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