"drivers/timer/tsc_timer.c" did not exist on "5c1b685e46756dc9504b919336321dad27dbcd9e"
clk: meson: fix clk81 divider calculation
clk81 divider is 0 based (meaning that 0 value in the register means divide by 1). Fix clk81 rate calculation for this. Signed-off-by:Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com>
Loading
Please register or sign in to comment