ADS5121: MAX slew rate for PATA pins

Signed-off-by: John Rigby <jrigby@freescale.com>

board/ads5121/ads5121.c

@@ -180,9 +180,17 @@ int checkboard (void)
 {
 	ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);
 	uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02);
+	volatile immap_t *im = (immap_t *) CFG_IMMR;
+	volatile unsigned long *reg;
+	int i;
 
 	printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
 		brd_rev, cpld_rev);
+
+	/* change the slew rate on all pata pins to max */
+	reg = (unsigned long *) &(im->io_ctrl.regs[PATA_CE1_IDX]);
+	for (i = 0; i < 9; i++)
+		reg[i] |= 0x00000003;
 	return 0;
 }
 

include/mpc512x.h

@@ -345,6 +345,15 @@
 
 /* Indexes in regs array */
 #define MEM_IDX			0x00
+#define PATA_CE1_IDX		0x2e
+#define PATA_CE2_IDX		0x2f
+#define PATA_ISOLATE_IDX	0x30
+#define PATA_IOR_IDX		0x31
+#define PATA_IOW_IDX		0x32
+#define PATA_IOCHRDY_IDX	0x33
+#define PATA_INTRQ_IDX		0x34
+#define PATA_DRQ_IDX		0x35
+#define PATA_DACK_IDX		0x36
 #define SPDIF_TXCLOCK_IDX	0x73
 #define SPDIF_TX_IDX		0x74
 #define SPDIF_RX_IDX		0x75