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Commit 5b297d1a authored by Becky Bruce's avatar Becky Bruce Committed by Kumar Gala
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tqm85xx: create fixed_sdram() to do sdram setup


Also, change this code to use phys_size_t instead of long int.
Using common naming for this function will enable us to use the common
initdram() for 85xx going forward.  Other than the type change,
this is just a code rearrange.

Signed-off-by: default avatarBecky Bruce <beckyb@kernel.crashing.org>
Acked-by: default avatarStefan Roese <sr@denx.de>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 058d7dc7
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...@@ -65,6 +65,7 @@ sdram_conf_t ddr_cs_conf[] = { ...@@ -65,6 +65,7 @@ sdram_conf_t ddr_cs_conf[] = {
#define N_DDR_CS_CONF (sizeof(ddr_cs_conf) / sizeof(ddr_cs_conf[0])) #define N_DDR_CS_CONF (sizeof(ddr_cs_conf) / sizeof(ddr_cs_conf[0]))
int cas_latency (void); int cas_latency (void);
static phys_size_t sdram_setup(int);
/* /*
* Autodetect onboard DDR SDRAM on 85xx platforms * Autodetect onboard DDR SDRAM on 85xx platforms
...@@ -73,7 +74,26 @@ int cas_latency (void); ...@@ -73,7 +74,26 @@ int cas_latency (void);
* so this should be extended for other future boards * so this should be extended for other future boards
* using this routine! * using this routine!
*/ */
long int sdram_setup (int casl) phys_size_t fixed_sdram(void)
{
int casl = 0;
phys_size_t dram_size = 0;
casl = cas_latency();
dram_size = sdram_setup(casl);
if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) {
/*
* Try again with default CAS latency
*/
printf("Problem with CAS lantency, using default CL %d/10!\n",
CONFIG_DDR_DEFAULT_CL);
dram_size = sdram_setup(CONFIG_DDR_DEFAULT_CL);
puts(" ");
}
return dram_size;
}
static phys_size_t sdram_setup(int casl)
{ {
int i; int i;
volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
...@@ -376,8 +396,7 @@ long int sdram_setup (int casl) ...@@ -376,8 +396,7 @@ long int sdram_setup (int casl)
phys_size_t initdram (int board_type) phys_size_t initdram (int board_type)
{ {
long dram_size = 0; phys_size_t dram_size = 0;
int casl;
#if defined(CONFIG_DDR_DLL) #if defined(CONFIG_DDR_DLL)
/* /*
...@@ -407,17 +426,7 @@ phys_size_t initdram (int board_type) ...@@ -407,17 +426,7 @@ phys_size_t initdram (int board_type)
} }
#endif #endif
casl = cas_latency (); dram_size = fixed_sdram();
dram_size = sdram_setup (casl);
if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) {
/*
* Try again with default CAS latency
*/
printf ("Problem with CAS lantency, using default CL %d/10!\n",
CONFIG_DDR_DEFAULT_CL);
dram_size = sdram_setup (CONFIG_DDR_DEFAULT_CL);
puts (" ");
}
return dram_size; return dram_size;
} }
......
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