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Commit 6efc1fc0 authored by Grzegorz Bernacki's avatar Grzegorz Bernacki Committed by Rafal Jaworowski
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[PPC440SPe] PCIe environment settings for Katmai and Yucca


- 'pciconfighost' is set by default in order to be able to scan bridges
behind the primary host/PCIe

- 'pciscandelay' env variable is recognized to allow for user-controlled
delay before the PCIe bus enumeration; some peripheral devices require a
significant delay before they can be scanned (e.g. LSI8408E); without the
delay they are not detected

Signed-off-by: default avatarGrzegorz Bernacki <gjb@semihalf.com>
parent 7f191393
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...@@ -396,6 +396,8 @@ void pcie_setup_hoses(int busno) ...@@ -396,6 +396,8 @@ void pcie_setup_hoses(int busno)
{ {
struct pci_controller *hose; struct pci_controller *hose;
int i, bus; int i, bus;
char *env;
unsigned int delay;
/* /*
* assume we're called after the PCIX hose is initialized, which takes * assume we're called after the PCIX hose is initialized, which takes
...@@ -439,6 +441,16 @@ void pcie_setup_hoses(int busno) ...@@ -439,6 +441,16 @@ void pcie_setup_hoses(int busno)
*/ */
#else #else
ppc440spe_setup_pcie_rootpoint(hose, i); ppc440spe_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul (env, NULL, 10);
if (delay > 5)
printf ("Warning, expect noticable delay before PCIe"
"scan due to 'pciscandelay' value!\n");
mdelay (delay * 1000);
}
/* /*
* Config access can only go down stream * Config access can only go down stream
*/ */
......
...@@ -850,6 +850,8 @@ void pcie_setup_hoses(int busno) ...@@ -850,6 +850,8 @@ void pcie_setup_hoses(int busno)
{ {
struct pci_controller *hose; struct pci_controller *hose;
int i, bus; int i, bus;
char *env;
unsigned int delay;
/* /*
* assume we're called after the PCIX hose is initialized, which takes * assume we're called after the PCIX hose is initialized, which takes
...@@ -895,6 +897,16 @@ void pcie_setup_hoses(int busno) ...@@ -895,6 +897,16 @@ void pcie_setup_hoses(int busno)
*/ */
#else #else
ppc440spe_setup_pcie_rootpoint(hose, i); ppc440spe_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul (env, NULL, 10);
if (delay > 5)
printf ("Warning, expect noticable delay before PCIe"
"scan due to 'pciscandelay' value!\n");
mdelay (delay * 1000);
}
/* /*
* Config access can only go down stream * Config access can only go down stream
*/ */
......
...@@ -201,6 +201,7 @@ ...@@ -201,6 +201,7 @@
"setenv filesize;saveenv\0" \ "setenv filesize;saveenv\0" \
"upd=run load;run update\0" \ "upd=run load;run update\0" \
"kozio=bootm ffc60000\0" \ "kozio=bootm ffc60000\0" \
"pciconfighost=1\0" \
"" ""
#define CONFIG_BOOTCOMMAND "run flash_self" #define CONFIG_BOOTCOMMAND "run flash_self"
...@@ -322,7 +323,7 @@ ...@@ -322,7 +323,7 @@
#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#undef CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_PCI_CONFIG_HOST_BRIDGE
/* Board-specific PCI */ /* Board-specific PCI */
#define CFG_PCI_TARGET_INIT /* let board init pci target */ #define CFG_PCI_TARGET_INIT /* let board init pci target */
......
...@@ -182,6 +182,7 @@ ...@@ -182,6 +182,7 @@
"cp.b ${fileaddr} FFFB0000 ${filesize};" \ "cp.b ${fileaddr} FFFB0000 ${filesize};" \
"setenv filesize;saveenv\0" \ "setenv filesize;saveenv\0" \
"upd=run load;run update\0" \ "upd=run load;run update\0" \
"pciconfighost=1\0" \
"" ""
#define CONFIG_BOOTCOMMAND "run flash_self" #define CONFIG_BOOTCOMMAND "run flash_self"
...@@ -297,7 +298,7 @@ ...@@ -297,7 +298,7 @@
#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#undef CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_PCI_CONFIG_HOST_BRIDGE
/* Board-specific PCI */ /* Board-specific PCI */
#define CFG_PCI_TARGET_INIT /* let board init pci target */ #define CFG_PCI_TARGET_INIT /* let board init pci target */
......
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