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Commit 72117dad authored by Paul Burton's avatar Paul Burton Committed by Daniel Schwierzeck
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malta: correct UART baudrate


CONFIG_SYS_NS16550_CLK specifies the rate of the clock 16x the baud
rate. The SMSC FDC37M81x datasheet states that a divider of 1 results in
a UART at 115200 baud, thus the x16 clock rate is 115200 * 16.
Previously the divider was left at 0 which led to a rate of 38400 baud
regardless of CONFIG_BAUDRATE or the baudrate environment variable.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
parent d18d49d7
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......@@ -80,7 +80,7 @@
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK 115200
#define CONFIG_SYS_NS16550_CLK (115200 * 16)
#define CONFIG_SYS_NS16550_COM1 CKSEG1ADDR(MALTA_GT_UART0_BASE)
#define CONFIG_SYS_NS16550_COM2 CKSEG1ADDR(MALTA_MSC01_UART0_BASE)
#define CONFIG_CONS_INDEX 1
......
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