pci/layerscape: add support for LS1043A PCIe LUT register access
The endian and base address of PEX LUT register region is different between Chassis 2 and Chassis 3, so move the base address definition to chassis specific header file and add pex_lut_* functions to access LUT register. Signed-off-by:Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by:
Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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- arch/arm/include/asm/arch-fsl-layerscape/config.h 2 additions, 0 deletionsarch/arm/include/asm/arch-fsl-layerscape/config.h
- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h 4 additions, 0 deletionsarch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h 4 additions, 0 deletionsarch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
- arch/arm/include/asm/arch-fsl-layerscape/soc.h 8 additions, 0 deletionsarch/arm/include/asm/arch-fsl-layerscape/soc.h
- drivers/pci/pcie_layerscape.c 7 additions, 7 deletionsdrivers/pci/pcie_layerscape.c
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