armv8: fsl_lsch2: Add LS1046A SoC support
The LS1046A processor is built on the QorIQ LS series architecture combining four ARM A72 processor cores with DPAA 1.0 support. Signed-off-by:Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by:
Mihai Bantea <mihai.bantea@freescale.com> Signed-off-by:
Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by:
Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- arch/arm/cpu/armv8/fsl-layerscape/Makefile 4 additions, 0 deletionsarch/arm/cpu/armv8/fsl-layerscape/Makefile
- arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc 42 additions, 0 deletionsarch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
- arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c 23 additions, 2 deletionsarch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
- arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c 99 additions, 0 deletionsarch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
- arch/arm/include/asm/arch-fsl-layerscape/config.h 27 additions, 0 deletionsarch/arm/include/asm/arch-fsl-layerscape/config.h
- arch/arm/include/asm/arch-fsl-layerscape/cpu.h 2 additions, 0 deletionsarch/arm/include/asm/arch-fsl-layerscape/cpu.h
- arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h 1 addition, 1 deletionarch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
- arch/arm/include/asm/arch-fsl-layerscape/soc.h 2 additions, 0 deletionsarch/arm/include/asm/arch-fsl-layerscape/soc.h
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