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Commit c79fd503 authored by Shaohui Xie's avatar Shaohui Xie Committed by Andy Fleming
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T4240/ramboot: enable PBL tool for T4240


Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use
PBL tool to produce the ramboot image.

Signed-off-by: default avatarShaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: default avatarAndy Fleming <afleming@freescale.com>
parent 0aadf4aa
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#PBI commands
#Initialize CPC1
09010000 00200400
09138000 00000000
091380c0 00000100
#512KB SRAM
09010100 00000000
09010104 fff80009
09010f00 08000000
#enable CPC1
09010000 80000000
#Configure LAW for CPC1
09000d00 00000000
09000d04 fff80000
09000d08 81000012
#workaround for IFC bus speed
091241c0 f03f3f3f
091241c4 ff003f3f
09124010 00000101
09124130 0000000c
#workaround for SERDES A-006031
090ea000 064740e6
090ea020 064740e6
090eb000 064740e6
090eb020 064740e6
090ec000 064740e6
090ec020 064740e6
090ed000 064740e6
090ed020 064740e6
#Configure alternate space
09000010 00000000
09000014 ff000000
09000018 81000000
#Flush PBL data
09138000 00000000
091380c0 00000000
#PBL preamble and RCW header
aa55aa55 010e0100
#serdes protocol 1_28_6_12
14180019 0c101916 00000000 00000000
04383060 30548c00 6c020000 19000000
00000000 ee0000ee 00000000 000187fc
00000000 00000000 00000000 00000018
......@@ -29,6 +29,8 @@
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t4qds/t4_pbi.cfg
#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t4qds/t4_rcw.cfg
#endif
#define CONFIG_CMD_REGINFO
......
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