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Commit e88f421e authored by Zang Roy-R61911's avatar Zang Roy-R61911 Committed by York Sun
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T4240: Address T4240/T4160 Rev2.0 DDR clock change


MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0.
It's 12 in Rev1.0, for Rev2.0 it uses 6.

Signed-off-by: default avatarRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: default avatarShaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: default avatarYork Sun <yorksun@freescale.com>
parent 7aa6c455
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