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Commit f11dea4f authored by Heiko Schocher's avatar Heiko Schocher Committed by Tom Rini
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spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header


move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h
and define a default value. Delete this define in the board
config files, where it is possible (all boards use currently
the same value).

Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
Reviewed-by: default avatarJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Reviewed-by: default avatarAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: default avatarAndreas Bießmann <andreas.devel@googlemail.com>
parent c001486d
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...@@ -94,3 +94,7 @@ static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave) ...@@ -94,3 +94,7 @@ static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)
readl(as->regs + ATMEL_SPI_##reg) readl(as->regs + ATMEL_SPI_##reg)
#define spi_writel(as, reg, value) \ #define spi_writel(as, reg, value) \
writel(value, as->regs + ATMEL_SPI_##reg) writel(value, as->regs + ATMEL_SPI_##reg)
#if !defined(CONFIG_SYS_SPI_WRITE_TOUT)
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#endif
...@@ -77,7 +77,6 @@ ...@@ -77,7 +77,6 @@
/* DataFlash */ /* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH #define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
......
...@@ -137,7 +137,6 @@ ...@@ -137,7 +137,6 @@
#ifndef CONFIG_AT91SAM9G20EK_2MMC #ifndef CONFIG_AT91SAM9G20EK_2MMC
#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1 #define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
......
...@@ -109,7 +109,6 @@ ...@@ -109,7 +109,6 @@
/* DataFlash */ /* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH #define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
......
...@@ -119,7 +119,6 @@ ...@@ -119,7 +119,6 @@
/* DataFlash */ /* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1 #define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define AT91_SPI_CLK 15000000 #define AT91_SPI_CLK 15000000
......
...@@ -100,7 +100,6 @@ ...@@ -100,7 +100,6 @@
/* DataFlash */ /* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1 #define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define AT91_SPI_CLK 15000000 #define AT91_SPI_CLK 15000000
......
...@@ -78,7 +78,6 @@ ...@@ -78,7 +78,6 @@
/* SPI */ /* SPI */
#define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define AT91_SPI_CLK 15000000 #define AT91_SPI_CLK 15000000
/* Serial port */ /* Serial port */
......
...@@ -124,7 +124,6 @@ ...@@ -124,7 +124,6 @@
#ifdef CONFIG_SYS_USE_DATAFLASH #ifdef CONFIG_SYS_USE_DATAFLASH
# define CONFIG_ATMEL_DATAFLASH_SPI # define CONFIG_ATMEL_DATAFLASH_SPI
# define CONFIG_HAS_DATAFLASH # define CONFIG_HAS_DATAFLASH
# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
# define AT91_SPI_CLK 15000000 # define AT91_SPI_CLK 15000000
......
...@@ -174,7 +174,6 @@ ...@@ -174,7 +174,6 @@
#ifdef CONFIG_SYS_USE_DATAFLASH #ifdef CONFIG_SYS_USE_DATAFLASH
# define CONFIG_ATMEL_DATAFLASH_SPI # define CONFIG_ATMEL_DATAFLASH_SPI
# define CONFIG_HAS_DATAFLASH # define CONFIG_HAS_DATAFLASH
# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
# define AT91_SPI_CLK 15000000 # define AT91_SPI_CLK 15000000
......
...@@ -202,7 +202,6 @@ ...@@ -202,7 +202,6 @@
/* DataFlash */ /* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH #define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
......
...@@ -216,7 +216,6 @@ ...@@ -216,7 +216,6 @@
/* DataFlash */ /* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH 1 #define CONFIG_HAS_DATAFLASH 1
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
#define AT91_SPI_CLK 15000000 #define AT91_SPI_CLK 15000000
......
...@@ -80,7 +80,6 @@ ...@@ -80,7 +80,6 @@
#define CONFIG_SPI #define CONFIG_SPI
#define CONFIG_CMD_SPI #define CONFIG_CMD_SPI
#define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_CMD_EEPROM #define CONFIG_CMD_EEPROM
#define CONFIG_SPI_M95XXX #define CONFIG_SPI_M95XXX
......
...@@ -85,7 +85,6 @@ ...@@ -85,7 +85,6 @@
#define CONFIG_SPI #define CONFIG_SPI
#define CONFIG_CMD_SPI #define CONFIG_CMD_SPI
#define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
#define CONFIG_CMD_EEPROM #define CONFIG_CMD_EEPROM
#define CONFIG_SPI_M95XXX #define CONFIG_SPI_M95XXX
......
...@@ -85,7 +85,6 @@ ...@@ -85,7 +85,6 @@
/* DataFlash */ /* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH #define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
#define AT91_SPI_CLK 8000000 #define AT91_SPI_CLK 8000000
......
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