pcnet: add cache flushing & invalidation

Ensure that the view of memory from the CPU & the ethernet controller is
coherent at the various points where they exchange data. This prevents
stale data from being transmitted or received, and prevents the driver
from getting stuck waiting for the ethernet controller to update
descriptors when in reality it has but the old values are being read
from cache.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>