OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.
The OMAP5 silicon has new DDR PHY design, which includes a external PHY
as well. So configuring the ext PHY parameters here. Also the EMIF timimg
registers and a couple of DDR mode registers needs to be updated based on
the testing from the actual silicon.
Signed-off-by:
R Sricharan <r.sricharan@ti.com>
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- arch/arm/cpu/armv7/omap-common/clocks-common.c 13 additions, 5 deletionsarch/arm/cpu/armv7/omap-common/clocks-common.c
- arch/arm/cpu/armv7/omap-common/emif-common.c 39 additions, 2 deletionsarch/arm/cpu/armv7/omap-common/emif-common.c
- arch/arm/cpu/armv7/omap4/sdram_elpida.c 4 additions, 0 deletionsarch/arm/cpu/armv7/omap4/sdram_elpida.c
- arch/arm/cpu/armv7/omap5/sdram_elpida.c 62 additions, 19 deletionsarch/arm/cpu/armv7/omap5/sdram_elpida.c
- arch/arm/include/asm/emif.h 70 additions, 2 deletionsarch/arm/include/asm/emif.h
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