powerpc/85xx: Refactor P2041RDB to use common p_corenet files
The P2041RDB has almost identical setup for TLB, LAWS, and PCI with
other P-Series CoreNet platforms.
The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the
CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the
TLB and LAW setup tables.
Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- board/freescale/common/Makefile 1 addition, 0 deletionsboard/freescale/common/Makefile
- board/freescale/common/p_corenet/law.c 5 additions, 0 deletionsboard/freescale/common/p_corenet/law.c
- board/freescale/common/p_corenet/tlb.c 7 additions, 0 deletionsboard/freescale/common/p_corenet/tlb.c
- board/freescale/p2041rdb/Makefile 0 additions, 3 deletionsboard/freescale/p2041rdb/Makefile
- board/freescale/p2041rdb/law.c 0 additions, 37 deletionsboard/freescale/p2041rdb/law.c
- board/freescale/p2041rdb/pci.c 0 additions, 39 deletionsboard/freescale/p2041rdb/pci.c
- board/freescale/p2041rdb/tlb.c 0 additions, 123 deletionsboard/freescale/p2041rdb/tlb.c
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