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  1. Feb 20, 2020
  2. Feb 12, 2020
    • Alexey Brodkin's avatar
      ARC: Switch to generic accessors · 07906b3d
      Alexey Brodkin authored
      
      First of all U-Boot is not that performance oriented as real run-time
      software like OS or user bare-metal app so we may afford being not super
      fast as we only being executed once. That in return allows us to be more
      universal and support wider variety of devices.
      
      And looking forward that will significantly reduce maintenance and simplify
      support of newer architectures.
      
      And while at it we add quad-word accessors like readq(), writeq() etc.
      
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      07906b3d
    • Eugeniy Paltsev's avatar
      ARC: rework setting of ARC CPU specific compiler options · c77bbc22
      Eugeniy Paltsev authored
      
      It's a very rare if at all existing occasion when ARC CPU template
      is used as is w/o any changes - in the end it's a beauty and competitive
      advantage of ARC cores to be tailored for a particular use-case - and
      so it doesn't make a lot of sense to offer template-based "-mcpu" selection.
      Given for each and every platform we end-up adding quite a few more flags
      it's logical to move "-mcpu" selection to platform's definition as well
      which we exactly do here.
      
      Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      c77bbc22
    • Alexey Brodkin's avatar
      ARC: nsim_hs38: Add support of Virtio NET & BLK · 95f7103f
      Alexey Brodkin authored
      
      Given now nsim_hs38 configuration is usable on QEMU and in QEMU
      we have Virtio working perfectly fine the next logical step
      is to add support of supported & known to work net & bkl to this
      config.
      
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      95f7103f
    • Alexey Brodkin's avatar
      ARC: nSIM: switch from ARC UART to DW UART · 9515e41d
      Alexey Brodkin authored
      
      Since v2019.06 DesingWare nSIM supports DesignWare UART simulation
      and so we may switch from pretty unusual ARC UART to much more standard
      DesignWare UART (which in case of U-Boot is just an ordinary 16650 UART).
      
      This among other things makes built dinaries compatible with our other
      platforms to name a few: FPGA-based HAPS boards, QEMU and even ZeBU.
      
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      9515e41d
  3. Jan 24, 2020
  4. Jan 17, 2020
  5. Dec 02, 2019
  6. Nov 01, 2019
  7. Oct 07, 2019
    • Eugeniy Paltsev's avatar
      NET: DW: fix regression for ARC boards · 2a723237
      Eugeniy Paltsev authored
      
      The commit
      642b80d2 ("net: designware: drop compatible altr, socfpga-stmmac")
      breaks designware ethernet for all ARC boards. It removes
      "altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
      without changing compatible in the boards which use it.
      
      Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
      "drivers/net/designware.c" and using it in ARC boards device tree.
      
      Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
      2a723237
  8. Sep 03, 2019
  9. May 18, 2019
    • Trevor Woerner's avatar
      CONFIG_SPL_SYS_[DI]CACHE_OFF: add · 10015025
      Trevor Woerner authored
      
      While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
      where these configuration items are conditional on SPL. This commit adds SPL
      variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
      the configurations as required.
      
      Acked-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      Signed-off-by: default avatarTrevor Woerner <trevor@toganlabs.com>
      [trini: Make the default depend on the setting for full U-Boot, update
      more zynq hardware]
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      10015025
    • Trevor Woerner's avatar
      CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig · a0aba8a2
      Trevor Woerner authored
      
      CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
      parameters; only for the ARC architecture. This patch turns these two
      parameters into Kconfig items everywhere else they are found.
      
      All of the include/configs/* and defconfig changes in this patch are
      for arm machines only. The Kconfig changes for arc, nds32, riscv,
      and xtensa have been included since these symbols are found in code
      under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
      include/configs/* or defconfigs for these architectures exist which
      include these symbols.
      
      These results have been confirmed with tools/moveconfig.py.
      
      Acked-by: default avatarAlexey Brodkin <abrodkin@snopsys.com>
      Signed-off-by: default avatarTrevor Woerner <trevor@toganlabs.com>
      [trini: Re-migrate for a few more boards]
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      a0aba8a2
  10. Apr 18, 2019
  11. Apr 12, 2019
  12. Jan 25, 2019
  13. Jan 19, 2019
    • Philipp Tomsich's avatar
      Kconfig: Migrate BOUNCE_BUFFER · 2acc24fc
      Philipp Tomsich authored
      
      The bounce buffer is used by a few drivers (most of the MMC drivers)
      to overcome limitations in their respective DMA implementation.
      
      This moves the configuration to Kconfig and makes it user-selectable
      (even though it will be a required feature to make those drivers
      work): the expected usage is for drivers depending on this to 'select'
      it unconditionally from their respective Kconfig (see follow-up
      patches).
      
      This commit includes a full migration using moveconfig.py to ensure
      that each commit compiles.  To ensure bisectability we update
      dependencies of various drivers to now select BOUNCE_BUFFER when needed.
      
      [trini: Squash all patches to ensure bisectability]
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      Signed-off-by: default avatarPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
      Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion]
      Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion]
      Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
      2acc24fc
  14. Dec 03, 2018
    • Alexey Brodkin's avatar
      ARC: Improve identification of ARC cores · 85e529fd
      Alexey Brodkin authored
      
      1. Try to guess a ARC core template that was used
         i.e. not just name a core family but something more
         menaingful like "ARC HS38", "ARC EM11D" etc.
      
         We do it checking availability of the key differentiation
         features like:
          - Caches (we actually only check for L1 I$ fpr simplicity)
          - XY-memory
          - DSP extensions etc.
      
      2. Identify ARC subsystems
      
      3. Print core clock frequency
      
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      85e529fd
  15. Nov 01, 2018
  16. Oct 15, 2018
    • Alexey Brodkin's avatar
      ARC: Don't use COMMON section for global not-initialized variables · 6e63314f
      Alexey Brodkin authored
      
      By default GCC puts global non-initialized variables in COMMON section.
      And we used to ignore existence of COMMON section in our linker
      scripts though smart LD silently appended it right after .bss.
      
      And the problem here is variables from COMMON section even though
      require zeroing in run-time were not zeroed as they were placed
      right after __bss_end symbol.
      
      It was a pure luck we never faced serious problem due to this,
      but now it is fixed.
      
      Now as for some other architectures we'll just force GCC to put
      those global variables in normal .bss section.
      
      This solution is much nicer than adding COMMON section to each and
      every linker script.
      
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      6e63314f
  17. Oct 12, 2018
  18. Oct 05, 2018
  19. Sep 11, 2018
  20. Sep 05, 2018
  21. Jul 31, 2018
    • Alexey Brodkin's avatar
      ARC: Enable unaligned access in hardware if compiler uses it · 8f590063
      Alexey Brodkin authored
      
      Even if ARC core might handle unaligned access to data this
      hardware feature by default is disabled.
      
      But GCC starting from 8.1.0 unconditionally uses it for ARC HS cores.
      Which leads to quite strange and fatal run-time failures like the one
      below if HW is not configured properly:
      | hsdk# sf probe
      | Misaligned data access exception @ 0xbff794d4
      | ECR:    0x000d0000
      | RET:    0xbff794d4
      | BLINK:  0xbff79644
      | STAT32: 0x00000800
      | GP: 0x1003e000   r25: 0xbfd58f08
      | BTA: 0xbff794a4  SP: 0xbfd58cd4  FP: 0xbfd58ef0
      | LPS: 0xbff90240 LPE: 0xbff90244 LPC: 0x00000000
      | r00: 0x00000000 r01: 0x00000003 r02: 0x000026bf
      | r03: 0x00000000 r04: 0x00000100 r05: 0x00000000
      | r06: 0x00000001 r07: 0x00000000 r08: 0x1dcd6500
      | r09: 0x00000000 r10: 0x00200000 r11: 0x00000000
      | r12: 0x1b3d4440 r13: 0xbff9eca4 r14: 0xbfd59d68
      | r15: 0xbfd60cd0 r16: 0x00000000 r17: 0x00000000
      | r18: 0xbff9ed14 r19: 0xbfd59c78 r20: 0xbfd58d40
      | r21: 0xbfd58d44 r22: 0x00000000 r23: 0x00000000
      | r24: 0xbfd59ba8
      | Resetting CPU ...
      
      Now we're checking for __ARC_UNALIGNED__ define emitted by the
      compiler if it's going to use unaligned access and then we
      force-enable it in hardware too.
      
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      8f590063
    • Eugeniy Paltsev's avatar
      AXS10x: add spi flash support · cdfe6913
      Eugeniy Paltsev authored
      
      AXS10x boards have n25q512 spi flash IC, so add corresponding
      nodes to device tree and enaple corresponding options in
      defconfig.
      
      Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      cdfe6913
    • Eugeniy Paltsev's avatar
      GPIO: CREG: improve flexibility of hsdk-creg-gpio driver · fe3eb7a8
      Eugeniy Paltsev authored
      
      CREG GPIO is a driver for weird soc-specific output ports, which are
      controlled by some fields in memory mapped register.
      
      Example:
      
      31                 9        7        5           0   < bit number
      |                  |        |        |           |
      [     not used     | gpio-1 | gpio-0 | <-shift-> ]   < 32 bit register
                             ^        ^
                             |        |
                      write 0x2 == set output to "1" (activate)
                      write 0x3 == set output to "0" (deactivate)
      
      As of tooday we only support fixed (hardcoded) bit per gpio line,
      activate / deactivatei and shift values. Fix that by read them from
      device tree to be able to use this driver for other boards.
      
      Remove "hsdk" prefix from compatible string as this driver can be
      used with different boards like HSDK, AXS101, AXS103, etc.
      
      Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
      Signed-off-by: default avatarAlexey Brodkin <abrodkin@synopsys.com>
      fe3eb7a8
  22. Jul 30, 2018
  23. Jun 18, 2018
  24. May 31, 2018
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