- Nov 24, 2014
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Yuan Yao authored
Add define CONFIG_SYS_WRITE_SWAPPED_DATA. For LS1021AQDS and LS1021QTWR nor flash write should swap the bytes when handle unaligned tail bytes. Because of the ending, if the date bus width is 16-bits and the number of bytes is odd, we should swap the byte when write the last one. Signed-off-by:
Yuan Yao <yao.yuan@freescale.com> Reviewed-by:
York Sun <yorksun@freescale.com>
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Alison Wang authored
SCFG_SCFGREVCR is SCFG bit reverse register. This register must be written with 0xFFFFFFFF before writing to any other SCFG register. Then other SCFG register could be written in big-endian mode. Address: 157_0000h base + 200h offset = 157_0200h Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15|16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 W/R SCFGREV Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0-31 SCFGREV SCFG Bit Reverse Control Filed 32'h 0000_0000 - No bit reverse is applied 32'h FFFF_FFFF - Bit reverse is applied; so 31:0 will be stored/read as 0:31 This patch removes the bit reversing for SCFG registers in u-boot. It will be implemented through PBI commands in RCW .pbi write 0x570200, 0xffffffff .end So other SCFG register could be written in big-endian mode in u-boot or kernel directly. Signed-off-by:
Alison Wang <alison.wang@freescale.com> Reviewed-by:
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Jason Jin authored
Disable the snoop for slave interface 0, 1 and 2 to avoid the interleaving on the CCI400 BUS. Signed-off-by:
Jason Jin <Jason.Jin@freescale.com> Signed-off-by:
Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by:
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Nikhil Badola authored
Enable USB EHCI Host on LS1021AQDS Signed-off-by:
Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by:
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Nikhil Badola authored
Define USB configs for LS1021XA such as CONFIG_SYS_FSL_USB1_ADDR, CONFIG_USB_MAX_CONTROLLER_COUNT Signed-off-by:
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Nikhil Badola authored
Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes Signed-off-by:
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- Nov 21, 2014
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Nikhil Badola authored
Move USB Errata checking code from "arch/powerpc" to architecture independent file "fsl_usb.h" so that errata(s) become independent of the architecture. For each erratum checking function for PPC arch, define a nop function for non PPC arch for successful compilation in either case Signed-off-by:
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- Nov 19, 2014
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Zhao Qiang authored
Signed-off-by:
Zhao Qiang <B45475@freescale.com> Reviewed-by:
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Tang Yuantian authored
There are 8 SCFG_SPARECR registers in SCFG memory block, not one. Signed-off-by:
Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by:
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Zhao Qiang authored
Signed-off-by:
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Zhao Qiang authored
add qe support to ls1021aqds Signed-off-by:
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Zhao Qiang authored
ls1021 is arm-core and support qe which is u-qe. add u-qe init for arm board. Signed-off-by:
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- Nov 17, 2014
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Bo Shen authored
The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display (optional, disabled by default) - Support ethernet - Support USB mass storage Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Andreas Bießmann <andreas.devel@googlemail.com>
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Bo Shen authored
The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display - Support ethernet - Support USB mass storage Signed-off-by:
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Bo Shen authored
The User Register in GMAC IP is used to select interface type. When with GE feature, it is used to select interface between RGMII and GMII. If without GE feature, it is used to select interface between MII and RMII. Signed-off-by:
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Josh Wu authored
As in SAMA5D4 SoC, the gf table in ROM code can not be seen. So, when we try to use PMECC, we need to build it when do initialization. Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it is defined we will build gf table runtime. The PMECC use the BCH algorithm, so based on the build_gf_tables() function in lib/bch.c, we can build the Galois Field lookup table. Signed-off-by:
Josh Wu <josh.wu@atmel.com> Signed-off-by:
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Heiko Schocher authored
replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by:
Heiko Schocher <hs@denx.de> Reviewed-by:
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Heiko Schocher authored
replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by:
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Heiko Schocher authored
add support for using spl code on at91sam9260 and at91sam9g45 based boards. Signed-off-by:
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Heiko Schocher authored
device ready pin is signalling that the device is ready on state 1 not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.c Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
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Heiko Schocher authored
erase one nand block in spl code. keep it simple, as size matters This is used on the upcoming taurus spl support. Signed-off-by:
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Heiko Schocher authored
using this driver in SPL code with CONFIG_SPL_NAND_ECC configured leads in an compileerror. Fix this. Signed-off-by:
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Heiko Schocher authored
enable to boot only a raw u-boot.bin image from nand with the CONFIG_SPL_NAND_RAW_ONLY define. This option saves space on boards where spl space is low. Signed-off-by:
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Heiko Schocher authored
Signed-off-by:
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Heiko Schocher authored
- compile mpddrc ram init code also for AT91SAM9M10G45 based boards. - in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED in the cr configuration Signed-off-by:
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Heiko Schocher authored
use the configure value for computing the ba_off value not the value from the cr register. This leaded in a wrong ram configuration on the upcoming corvus spl board support. Signed-off-by:
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Heiko Schocher authored
Signed-off-by:
Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by:
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Heiko Schocher authored
move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h and define a default value. Delete this define in the board config files, where it is possible (all boards use currently the same value). Signed-off-by:
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Heiko Schocher authored
generate the boot.bin file for all atmel SoC (arm920, arm926, armv7) Signed-off-by:
Masahiro Yamada <yamada.m@jp.panasonic.com> [fix subject] Signed-off-by:
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Bo Shen authored
The clock source for master clock can be slow clock, main clock, plla clock or upll clock. So, make the clock source selection field in mckr can be configured. Signed-off-by:
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Bo Shen authored
We need to make sure the main clock ready field in MCFR is set after switch to main crystal oscillator. Signed-off-by:
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Bo Shen authored
Signed-off-by:
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Bo Shen authored
When boot up without mac address setting, it will give the warning message like: "Warning: failed to set MAC address", however when execute network related command, it still execute them without any warning information. With this patch, it will exit directly with following information: "gmac0: mac address is not valid" It also solve the problem after bootup then set mac address and the mac address won't set to net device issue. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by:
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git://git.denx.de/u-boot-shTom Rini authored
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git://git.denx.de/u-boot-shTom Rini authored
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Nobuhiro Iwamatsu authored
Common part of config for lager, koelsch, alt and gose board will be able to replace rcar-gen2-common.h. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Nobuhiro Iwamatsu authored
The lager, koelsch, alt, gose board supported in rmobile is distinguished as the R-Car Gen2 series and has much common setting. This collect up the common part of config as rcar-gen2-common.h. Signed-off-by:
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Nobuhiro Iwamatsu authored
Gose board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of dram_init_banksize instead. Signed-off-by:
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Nobuhiro Iwamatsu authored
Lager board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of dram_init_banksize instead. Signed-off-by:
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Nobuhiro Iwamatsu authored
Koesch board is defined CONFIG_SYS_SDRAM_BASE, and this can use a basic function of dram_init_banksize instead. Signed-off-by:
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