- Apr 07, 2008
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git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk authored
Conflicts: lib_ppc/board.c Signed-off-by:
Wolfgang Denk <wd@denx.de>
- Apr 03, 2008
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Stefan Roese authored
This patch fixes a problem with the RGMII setup of the 460GT. The 460GT has 2 RGMII instances and we need to configure the 2nd RGMII instance for the EMAC2+3 channels. Signed-off-by:
Stefan Roese <sr@denx.de>
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- Apr 02, 2008
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Stefan Roese authored
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA interface. This usage can be configured with the jumper J6. This patch correctly configures the SATA/PCIe PHY for SATA usage when this jumper is installed. Signed-off-by:
Stefan Roese <sr@denx.de>
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- Mar 31, 2008
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TsiChung Liew authored
When the version_string function in start.S is not 4-byte align, it will cause the compiler generates "unaligned opcodes detected in executable segment". This issue affects all ColdFire CPUs. By adding .align 4 after CONFIG_IDENT_STRING, it will pad 0's if it is not aligned. Signed-off-by:
TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by:
John Rigby <jrigby@freescale.com>
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TsiChung Liew authored
Signed-off-by:
TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by:
John Rigby <jrigby@freescale.com>
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TsiChung Liew authored
This board never went into production Signed-off-by:
Zachary P. Landau <zachary.landau@labxtechnologies.com> Acked-by:
TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by:
John Rigby <jrigby@freescale.com>
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Matthew Fettke authored
Signed-off-by:
Matthew Fettke <mfettke@videon-central.com> Signed-off-by:
TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by:
John Rigby <jrigby@freescale.com>
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Matthew Fettke authored
Signed-off-by:
Matthew Fettke <mfettke@videon-central.com> Signed-off-by:
TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by:
John Rigby <jrigby@freescale.com>
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TsiChung Liew authored
Signed-off-by:
Matt Wadel <Matt.Waddel@freescale.com> Acked-by:
TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by:
John Rigby <jrigby@freescale.com>
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TsiChung Liew authored
Signed-off-by:
TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by:
John Rigby <jrigby@freescale.com>
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TsiChung Liew authored
Signed-off-by:
TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by:
John Rigby <jrigby@freescale.com>
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Larry Johnson authored
Signed-off-by:
Larry Johnson <lrj@acm.org>
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Matthias Fuchs authored
Signed-off-by:
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Matthias Fuchs authored
Add support for the ptm1la, ptm1ms, ptm2la and ptm2ms environment variables. Cleanup pci_target_init. Signed-off-by:
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Matthias Fuchs authored
Signed-off-by:
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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- Mar 30, 2008
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Mike Frysinger authored
Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
All of the duplicated code for Blackfin processors and boot modes have been unified. After all, the core is the same for all processors, just the peripheral set differs (which gets handled in the drivers). Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This punts the old spi flash driver for a new/generalized one until the common one can be integrated. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Peter Pearse authored
to prevent compilation error. Signed-off-by:
Peter Pearse <peter.pearse@arm.com>
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Guennadi Liakhovetski authored
This patch adds support for the MX31ADS evaluation board from Freescale, initialization code is copied from RedBoot sources, also provided by Freescale. Signed-off-by:
Guennadi Liakhovetski <lg@denx.de>
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Sascha Hauer authored
This patch adds support for the Phytec Phycore-i.MX31 board Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Guennadi Liakhovetski <lg@denx.de>
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Sascha Hauer authored
This patch adds support for the mx31 litekit board Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Guennadi Liakhovetski <lg@denx.de>
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Sascha Hauer authored
This patch adds a driver for the following smsc network controllers: LAN9115 LAN9116 LAN9117 LAN9215 LAN9216 LAN9217 Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Guennadi Liakhovetski <lg@denx.de>
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Sascha Hauer authored
This patch adds an i2c driver for Freescale i.MX processors Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Guennadi Liakhovetski <lg@denx.de>
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Sascha Hauer authored
This patch adds the core support for Freescale mx31 Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Guennadi Liakhovetski <lg@denx.de>
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Sascha Hauer authored
Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Guennadi Liakhovetski <lg@denx.de>
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Peter Pearse authored
Signed-off-by:
Peter Pearse <peter.pearse@arm.com>
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Pieter Voorthuijsen authored
Signed-off-by:
Pieter Voorthuijsen <pv@prodrive.nl>
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Pieter Voorthuijsen authored
Signed-off-by:
Pieter Voorthuijsen <pv@prodrive.nl>
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Dirk Behme authored
- Adapt register naming to recent TI spec (sprue26, March 2007) - Fix reset_timer() handling - As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this. [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179 - Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV). Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing! Signed-off-by:
Dirk Behme <dirk.behme@gmail.com> Acked-by:
Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
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- Mar 29, 2008
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Daniel Hellstrom authored
SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address. SPARC CPUs implement flash_read64 which calls __raw_readq. For current SPARC architectures (LEON2 and LEON3) each read from the FLASH must lead to a cache miss. This is because FLASH can not be set non-cacheable since program code resides there, and alternatively disabling cache is poor from performance view, or doing a cache flush between each read is even poorer. Forcing a cache miss on a SPARC is done by a special instruction "lda" - load alternative space, the alternative space number (ASI) is processor implementation spcific and can be found by including <asm/processor.h>. Signed-off-by:
Daniel Hellstrom <daniel@gaisler.com>
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- Mar 28, 2008
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Joakim Tjernlund authored
Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx and use GOT relative reference. Signed-off-by:
Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com>
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