- Apr 27, 2010
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Stefano Babic authored
Added support for LCD and splash image to the QONG module. The supported display is VBEST-VGG322403. Signed-off-by:
Stefano Babic <sbabic@denx.de>
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Dave Liu authored
For P1022 SATA host controller, the data snoop bit of DW3 in PRDT is moved to bit28. Signed-off-by:
Dave Liu <daveliu@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Dave Liu authored
After power on, the SATA host controller of P1022 Rev1 is configured in legacy mode instead of the expected enterprise mode. Software needs to clear bit[28] of HControl register to change to enterprise mode after bringing the host offline. Signed-off-by:
Dave Liu <daveliu@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Apr 24, 2010
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Thomas Chou authored
This patch adds an option to bypass output waiting when there is no jtag connection. This allows the jtag uart work similar to a serial uart, ie, boot even without connection. This option is enabled with CONFIG_ALTERA_JTAG_UART_BYPASS Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Anatolij Gustschin authored
Subsequent patch extends mpc512x serial driver to support multiple PSC ports. The driver will provide an uninit() function to stop the serial controller and to disable the controller's clock. Adding uninit() entry to struct serial_device allows disabling the serial controller after usage of a stdio serial device. This patch adds uninit() entry to the struct serial_device and fixes initialization of this structure in the code accordingly. Signed-off-by:
Anatolij Gustschin <agust@denx.de>
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Dipen Dudhat authored
On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by:
Dipen Dudhat <dipen.dudhat@freescale.com>
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- Apr 21, 2010
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Stefan Roese authored
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by:
Stefan Roese <sr@denx.de> Acked-by:
Wolfgang Denk <wd@denx.de> Acked-by:
Detlev Zundel <dzu@denx.de> Acked-by:
Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
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- Apr 19, 2010
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Richard Retanubun authored
This patch adds a callpoint in i2c_init that allows board specific i2c board initialization (typically for i2c bus reset) that is called after i2c_init operations, allowing the i2c_board_late_init function to use the pre-configured i2c bus speed and slave address.
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- Apr 13, 2010
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
The appropriate include/asm-$ARCH directory should already by symlinked to include/asm so using the whole "asm-$ARCH" path is unnecessary. This change should also allow us to move the include/asm-$ARCH directories into their appropriate lib/$ARCH/ directories. Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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- Apr 09, 2010
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Albin Tonnerre authored
Signed-off-by:
Albin Tonnerre <albin.tonnerre@free-electrons.com>
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- Apr 08, 2010
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Sergei Shtylyov authored
Add NEC EHCI controller to the list of the supported devices. Signed-off-by:
Sergei Shtylyov <sshtylyov@mvista.com> drivers/usb/host/ehci-pci.c | 1 + 1 file changed, 1 insertion(+)
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Sergei Shtylyov authored
Commit b416191a (Fix EHCI port reset.) didn't move the code that checked for successful clearing of the port reset bit from ehci_submit_root(), relying on wait_ms() call instead. The mentioned code also erroneously reported port reset state when the reset was already completed. Signed-off-by:
Sergei Shtylyov <sshtylyov@mvista.com>
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Sergei Shtylyov authored
USB devices on the 2nd port are not detected and I get the following message: The request port(1) is not configured That's with default CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS value of 2. 'req->index' is 1-based, so the comparison in ehci_submit_root() can't be correct. Signed-off-by:
Sergei Shtylyov <sshtylyov@mvista.com>
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Sergei Shtylyov authored
On little endian machines, EHCI root hub's USB revision is reported as 0.2 -- cpu_to_le16() was missed in the initializer for the 'bcdUSB' descriptor field. The same should be done for the 'bcdDevice' field. Signed-off-by:
Sergei Shtylyov <sshtylyov@mvista.com>
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Anatolij Gustschin authored
Fixes this warning: ati_radeon_fb.c: In function 'radeon_probe': ati_radeon_fb.c:598: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'void *' Signed-off-by:
Anatolij Gustschin <agust@denx.de>
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Ed Swarthout authored
Use pci_bus_to_virt() to convert the bus address from the BARs to virtual address' to eliminate the direct mapping requirement. Rename variables to better match usage (_phys -> _bus or no-suffix) This fixes the mpc8572ds CONFIG_PHYS_64BIT mode failure: "videoboot: Video ROM failed to map!" Tested on mpc8572ds with and without CONFIG_PHYS_64BIT. Signed-off-by:
Ed Swarthout <Ed.Swarthout@freescale.com>
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Ed Swarthout authored
Console was being switched to video even if emulator fails and causing this hang: Scanning PCI bus 04 04 00 1095 3132 0104 00 PCIE3 on bus 03 - 04 Video: ATI Radeon video card (1002, 5b60) found @(2:0:0) videoboot: Booting PCI video card bus 2, function 0, device 0 videoboot: Video ROM failed to map! 640x480x8 31kHz 59Hz radeonfb: FIFO Timeout ! Signed-off-by:
Ed Swarthout <Ed.Swarthout@freescale.com> Tested-by:
Anatolij Gustschin <agust@denx.de>
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Anatolij Gustschin authored
Allow displaying 8-bit RLE BMP images. Signed-off-by:
Anatolij Gustschin <agust@denx.de>
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- Apr 07, 2010
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Thomas Chou authored
This patch adds reset_timer() before the flash status check waiting loop. Since the timer is basically running asynchronous to the cfi code, it is possible to call get_timer(0), then only a few _SYSCLK_ cycles later an interrupt is generated. This causes timeout even though much less time has elapsed. So the timer period registers should be reset before get_timer(0) is called. There is similar usage in nand_base.c. Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Stefan Roese <sr@denx.de>
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Kumar Gala authored
There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list * Added number of LAWs for P1012/P1013/P1021/P1022 * Set CONFIG_MAX_CPUS to 2 for P1021/P1022 * PCI port config Signed-off-by:
Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by:
Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
If the PCI controller wasn't configured or enabled delete from the device tree (include its alias). For the case that we didn't even configure u-boot with knowledge of the controller we can use the fact that the pci_controller pointer is NULL to delete the node in the device tree. We determine that a controller was not setup (because of HW config) based on the fact that cfg_addr wasn't setup. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Roy Zang authored
When we set the read or write watermark in WML we should maintain the rest of the register as is, rather than using some hard coded value. Signed-off-by:
Roy Zang <tie-fei.zang@freescale.com> Acked-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Jerry Huang authored
To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function. Signed-off-by:
Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by:
Roy Zang <tie-fei.zang@freescale.com> Acked-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org> Acked-by:
Stefano Babic <sbabic@denx.de>
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- Apr 06, 2010
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Stefan Roese authored
This patch moves the PPC4xx specific I2C device driver into the I2C drivers directory. All 4xx config headers are updated to include this driver. Signed-off-by:
Stefan Roese <sr@denx.de>
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- Apr 03, 2010
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Matthias Fuchs authored
This patch is part of migrating the AT91 support towards using C struct for all SOC access. It removes one more CONFIG_AT91_LEGACY warning. at91_pmc.h needs cleanup after migration of the drivers has been done. Signed-off-by:
Matthias Fuchs <matthias.fuchs@esd.eu>
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Achim Ehrlich authored
This converts the at91 watchdog driver to new c structure type to access registers of the SoC Signed-off-by:
Achim Ehrlich <aehrlich@taskit.de>
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- Apr 02, 2010
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Scott McNutt authored
The outx/writex macros were using writex(addr, val) rather than the standard writex(val, addr), resulting in incompatibilty with architecture independent components. This change set uses standard parameter order. Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Scott McNutt authored
The standard Altera UART & JTAG UART as well as the OpenCores YANU driver are now in individual files in drivers/serial rather than a single file uner cpu/nios2. Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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- Mar 31, 2010
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Heiko Schocher authored
Only fill the device enetaddr with the contents of the eeprom, do not program it in MAC address registers Signed-off-by:
Heiko Schocher <hs@denx.de> Acked-by:
Ben Warren <biggerbadderben@gmail.com>
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- Mar 26, 2010
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Thomas Chou authored
This patch adds status polling method to offer an alternative to data toggle method for amd flash chips. This patch is needed for nios2 cfi flash interface, where the bus controller performs 4 bytes read cycles for a single byte read instruction. The data toggle method can not detect chip busy status correctly. So we have to poll DQ7, which will be inverted when the chip is busy. This feature is enabled with the config def, CONFIG_SYS_CFI_FLASH_STATUS_POLL Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Stefan Roese <sr@denx.de>
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- Mar 25, 2010
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Renato Andreola authored
With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000. Signed-off-by:
Renato Andreola <renato.andreola@imagos.it> Signed-off-by:
Alessandro Rubini <rubini@gnudd.com> Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Stefan Roese <sr@denx.de>
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- Mar 24, 2010
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TsiChung Liew authored
Provide proper port passing from serial_init to uart_part_conf. Signed-off-by:
TsiChung Liew <tsicliew@gmail.com>
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Wolfgang Wegner authored
Using seperate function calls for each bit-bang of slave serial load can be painfully slow. This patch adds the possibility to supply a block write function that loads the complete block of data in one call (like it can already be done with Altera FPGAs). On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load time from around 15 seconds to around 3 seconds Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
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- Mar 23, 2010
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Nikolay Petukhov authored
This is a patch to use the hardware ECC controller of the AT91SAM9260 for the AT91 nand. Taken from the kernel 2.6.33. Signed-off-by:
Nikolay Petukhov <Nikolay.Petukhov@gmail.com>
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Cyril Chemparathy authored
Modified to use IO accessor routines consistently. Eliminated volatile usage to keep checkpatch.pl happy. Signed-off-by:
Cyril Chemparathy <cyril@ti.com>
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- Mar 21, 2010
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Detlev Zundel authored
We do not support a processor that never reached a real customer. Signed-off-by:
Detlev Zundel <dzu@denx.de>
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