- Apr 24, 2010
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Thomas Chou authored
This is a generic approach to port u-boot for nios2 boards. You may find the usage of this approach on the nioswiki, http://nioswiki.com/DasUBoot A fpga parameter file, which contains base address information and drivers declaration, is generated from Altera's hardware system description sopc file using tools. The example fpga parameter file is compatible with EP1C20, EP1S10 and EP1S40 boards. So these boards can be removed after this commit. Though epcs controller is removed to cut the dependency of altera_spi driver. Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Thomas Chou authored
This patch fixes error when CONFIG_SYS_NO_FLASH. And adds nand flash and mmc initialization, which should go before env initialization. Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Thomas Chou authored
Global interrupt should be disabled from the beginning. Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Thomas Chou authored
This patch adds an option to bypass output waiting when there is no jtag connection. This allows the jtag uart work similar to a serial uart, ie, boot even without connection. This option is enabled with CONFIG_ALTERA_JTAG_UART_BYPASS Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Thomas Chou authored
This function return cache-line aligned allocation which is mapped to uncached io region. Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Thomas Chou authored
This patch adds 64 bits swab support. Most 32 bits processors use this. We need 64 bits swab for UBI. Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Thomas Chou authored
This patch toggles power to reset the cf card. Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Thomas Chou authored
This patch allow boards to override the default link script. Signed-off-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Dipen Dudhat authored
On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by:
Dipen Dudhat <dipen.dudhat@freescale.com>
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- Apr 21, 2010
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Stefan Roese authored
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by:
Stefan Roese <sr@denx.de> Acked-by:
Wolfgang Denk <wd@denx.de> Acked-by:
Detlev Zundel <dzu@denx.de> Acked-by:
Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
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- Apr 19, 2010
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Stefan Roese authored
This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by:
Stefan Roese <sr@denx.de>
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Richard Retanubun authored
This patch adds a callpoint in i2c_init that allows board specific i2c board initialization (typically for i2c bus reset) that is called after i2c_init operations, allowing the i2c_board_late_init function to use the pre-configured i2c bus speed and slave address.
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- Apr 16, 2010
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Scott McNutt authored
Signed-off-by:
Scott McNutt <smcnutt@psyent.com>
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Michal Simek authored
Merge cpu and lib cache code. Flush cache before disabling. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
There is used max cache size on system which doesn't define cache size. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
WB cache use different instruction that WT cache but the major code is that same. That means that wdc.flush on system with WT cache do the same thing as before. You need newer toolchain with wdc.flush support. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
env_relocation should be called first. Added stdio_init too. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
It is more accurate to show that caches are OFF instead of FAIL. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
It is better to read ivr and react on it than do long parsing from two regs. Interrupt controller returs actual irq number. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
Move FSL out of interrupt controller. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
I would like to handle case where system doesn't contain intc that's why I need timer initialization out of intc code. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
It is ancient code. There is possible to save several instructions just if we use offset instead of addik Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Arun Bhanu authored
This patch adds FDT (flattened device tree) support to microblaze arch. Tested with Linux arch/microblaze kernels with and without compiled in FDT on Xilinx ML506 board. Signed-off-by:
Arun Bhanu <arun@bhanu.net> Signed-off-by:
Michal Simek <monstr@monstr.eu>
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- Apr 14, 2010
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Stefan Roese authored
The 440SPe Rev. A is quite old and newer 440SPe boards don't need support for this CPU revision. Since removing support for this older version simplifies the creation for newer U-Boot ports, this patch now enables 440SPe > Rev. A support by creating the CONFIG_440SPE_REVA define. By defining this in the board config header, Rev. A will still be supported. Otherwise (default for newer board ports), Rev. A will not be supported. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
The latest changes increased the size of the alpr image a bit more. Now it doesn't fit into the 256k reserved for it. This patch now removes the commands "loads" and "loadb" which are not needed in the production systems. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
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- Apr 13, 2010
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Peter Tyser authored
Also fix up some whitespace issues that were introduced when moving directory locations. Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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Peter Tyser authored
Signed-off-by:
Peter Tyser <ptyser@xes-inc.com>
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