Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

When the LM73 temperature sensor measures a temperature below 0 C, the
current driver does not perform sign extension, so the result returned is
512 C too high.  This patch fixes the problem, and does general cleanup
of the code.

Signed-off-by: Larry Johnson <lrj@acm.org>

Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit
series require different addresses for buffered write commands. Define a
configuration option to support buffered writes on those chips. A more
elegant solution would be to automatically detect those chips by parsing
their CFI records, but that would require introduction of a fixup table
into the cfi_flash driver.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

32-bit wide ECC memory modules report 40-bit width.
Changed the DIMM data bus width test to 'less than 64' instead of 'equal 32'.

Signed-off-by: Lee Nipper <lee.nipper@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Currently the serdes will not be initializated due to the
partid's error.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Currently the SATA controller clock is configured as CSB clock,
usually the CSB clock is 400/333/266MHz.

However, The SATA IP block is only guaranteed to operate up to
200 MHz as stated in the HW spec.

The bug is reported by Joe D'Abbraccio <ljd015@freescale.com>

This patch makes the SATA clock as half of CSB clock.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

We were looking at the wrong memory offset to determine of a secondary
cpu had been spun up or not.  Also added a warning message if the
all the secondary cpus we expect don't spin up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

The recent change introduced by 'Update SVR numbers to expand support'
now requires that we use SVR_SOC_VER instead of SVR_VER if we want
to compare against a particular processor id.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Corrected DCR addresses of PPC440EP power management registers.

Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>

Reverting became necessary after it turned out that the patches in
the u-boot-arm repo were modified, and in some cases corrupted.

This reverts the following commits:

	066bebd6
	7a837b73
	c88ae205
	a147e56f
	d6674e0e
	8c8463cc
	c98b47ad
	8bf69d81
	8c16cb0d
	a574a738
	1377b558
	1704dc20

Signed-off-by: Wolfgang Denk <wd@denx.de>

This patch reworks the default environment on Kilauea/Haleakala. Now
"net_nfs" for exmaple uses the device-tree style booting formerly know
as "net_nfs_fdt". Also the addresses in RAM were changed because of the
new image booting support, which check for image overwriting. So the
addresses needed togeet adjusted.

Signed-off-by: Stefan Roese <sr@denx.de>

Since the new image support checks for image overwriting, the default
environment needs to get adjusted to use correct addresses.

Signed-off-by: Stefan Roese <sr@denx.de>

The patch 70431e8a (Make MPC83xx one step
closer to full relocation.) doesn't use CFG_MONITOR_BASE anymore. But
on 4xx systems _start currently cannot be used for this calculation.
So revert back to the original version for now.

Signed-off-by: Stefan Roese <sr@denx.de>

FLAGS are generated by U-BOOT generator.
Board specific FLAGS are in board directory

Signed-off-by: Michal Simek <monstr@monstr.eu>

Signed-off-by: Michal Simek <monstr@monstr.eu>

Signed-off-by: Michal Simek <monstr@monstr.eu>

Signed-off-by: Michal Simek <monstr@monstr.eu>

Signed-off-by: Michal Simek <monstr@monstr.eu>

Signed-off-by: Michal Simek <monstr@monstr.eu>

Signed-off-by: Michal Simek <monstr@monstr.eu>

Signed-off-by: Michal Simek <monstr@monstr.eu>

Signed-off-by: Michal Simek <monstr@monstr.eu>

SPARC/LEON2: added support for Gaisler simulator GRSIM/TSIM for SPARC/LEON2 targets. See www.gaisler.com for information.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>

SPARC/LEON3: added support for GR-CPCI-AX2000 FPGA AX board. The FPGA is exchangeable but a standard LEON3 design is assumed. See www.gaisler.com for information.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>

SPARC/LEON3: added support for Altera NIOS Development kit (STRATIX II Edition) with GRLIB template design. See www.gaisler.com for information.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>

SPARC/LEON3: added support for Gaisler GRSIM/TSIM2 SPARC/LEON3 simulatorn. See www.gaisler.com for information.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>

SPARC/LEON3: added support for GR-XC3S-1500 board with GRLIB template design. See www.gaisler.com for board information.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>