Signed-off-by: Wolfgang Denk <wd@denx.de>

The bios emulator in the MAI board can not pass compile
and have a lot of crap in it. remove it and will have a
clean and small bios emulator in the drivers directory
which can be uesed for every board.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>

Signed-off-by: Jason Jin <Jason.jin@freescale.com>

This patch add definition of the BIOS emulator and the ATI framebuffer
driver for MPC8641HPCN board.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>

ATI video card BIOS. and can be used for x86 code emulation by some
modifications.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>

X300, X700, X800 ATI video cards.

Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Additionally export the following fuctions (to make trab_config build again):
- simple_strtol()
- strcmp()

Also bump the ABI version to reflect this change

Signed-off-by: Martin Krause <martin.krause@tqs.de>

All of the PCI/PCI-Express driver and initialization code that
was in the MPC8641HPCN port has now been moved into the common
drivers/fsl_pci_init.c.  In a subsequent patch, this will be
utilized by the 85xx ports as well.

Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added.

Also enable the second PCI-Express controller on 8641
by getting its BATS and CFG_ setup right.

Fixed a u16 vendor compiler warning in AHCI driver too.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>

Conflicts:

	CHANGELOG
	fs/fat/fat.c
	include/configs/MPC8560ADS.h
	include/configs/pcs440ep.h
	net/eth.c

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

The following MPC5121e subsystems are supported:

- low-level CPU init
- NOR Boot Flash (common CFI driver)
- DDR SDRAM
- FEC
- I2C
- Watchdog

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Jan Wrobel <wrr@semihalf.com>

Signed-off-by: Rafal Jaworowski <raj@semihalf.com>

This patch fixes the negative consequences for 8xx of the recent
"ppc4xx: Clean up 440 exceptions handling" commit.

Signed-off-by: Rafal Jaworowski <raj@semihalf.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Heiko Schocher <hs@denx.de>

		- fix compile error, if BUILD_DIR is used

Signed-off-by: Heiko Schocher <hs@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

The Marvel 88E1111S driver for the TSEC was copied from the
88E1101 driver, and included a fix for an erratum which does not
exist on that part.  Now it is removed

Signed-off-by: Andy Fleming <afleming@freescale.com>

adds the reset register to 85xx immap

Signed-off-by: Eran Liberty <eran.liberty@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

Made the boot commands use device trees by default.
Also moved the ramdisk to 1000000 (I think the previous address
was getting overridden during boot).

Signed-off-by: Andy Fleming <afleming@freescale.com>

The OBJTREE != SRCTREE build scenario was broken.
This fixes it.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>

Jarrold Wen noticed that the generic PHY code always matches
under the current implementation.  Change it so the first match
wins, and *only* unknown PHYs trigger the generic driver

Signed-off-by: Andy Fleming <afleming@freescale.com>

* Adds code to modify CPM frequencies
* Cleans up the config file to #define TSEC and (for now) #undef FCC
* Adds the MII command for all 8560 ADS configurations
* Updates config file to provide convenience commands for booting
  with a device tree

Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

Fix a bug in the Marvell 88e1145 PHY init code in the TSEC driver
where the reset was being done after the errata code instead of
before.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>

The P2P bridge bus numbers programmed into the device are relative to
hose->first_busno.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>

FSL PCIe block has extended cfg registers in the 100 and 400 range.
For example, to read the LTSSM register: pci display <busn>.0 404 1

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>

- Make pciauto_{pre,post}scan_setup_bridge non-static
- Added physical address display in debug messages.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>

Ensure hose->current_busno is not less than first_busno.  This fixes
broken board code which leaves current_busno=0 when first_busno is
greater than 0 for the cases with multiple controllers.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>

Signed-off-by: Stefan Roese <sr@denx.de>