- Apr 03, 2013
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Javier Martinez Canillas authored
board/freescale/mx6qsabrelite/README explain a procedure to update the SPI-NOR on the SabreLite board without Freescale manufacturing tool but following this procedure leads to both "sf erase" and "sf write" failing on a mx6qsabrelite board: MX6QSABRELITE U-Boot > sf probe 1 MX6QSABRELITE U-Boot > sf erase 0 0x40000 SPI flash erase failed MX6QSABRELITE U-Boot > sf write 0x10800000 0 0x40000 SPI flash write failed This is because the chip-select 1 is wrong and the correct value is 0x7300. Since commit c1173bd0 ("sf command: allow default bus and chip selects") the chip-select and bus arguments for the sf probe command are optional so let's just remove it and use "sf probe" instead. Signed-off-by:
Javier Martinez Canillas <javier.martinez@collabora.co.uk>
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Fabio Estevam authored
CONFIG_SYS_FSL_USDHC_NUM is not used for wandboard. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Otavio Salvador <otavio@ossystems.com.br>
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Fabio Estevam authored
No need to call 'mmc dev' twice. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Otavio Salvador <otavio@ossystems.com.br>
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Fabio Estevam authored
No need to call 'mmc dev' twice. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Otavio Salvador <otavio@ossystems.com.br>
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Fabio Estevam authored
When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev() returns 0x62xxx, which is not a value understood by the VPU (Video Processing Unit) library in the kernel and causes the video playback to fail. The expected values for get_board_rev are: 0x63xxx: For mx6quad/dual 0x61xxx: For mx6dual-lite/solo So adjust get_board_rev() accordingly and make it as weak function, so that we do not need to define it in every mx6 board file. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Dirk Behme <dirk.behme@de.bosch.com> Acked-by:
Eric Nelson <eric.nelson@boundarydevices.com>
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Alexandre Pereira da Silva authored
The netargs variable was referencing the non-existing variable console_mainline. Change that to console variable instead. Signed-off-by:
Alexandre Pereira da Silva <aletes.xgr@gmail.com> Acked-by:
Otavio Salvador <otavio@ossystems.com.br>
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Abbas Raza authored
Maximum bus width supported by some i.MX6 boards is not 8bit like others. In case where both host controller and card support 8bit transfers, they agree to communicate on 8bit interface while some boards support only 4bit interface. Due to this reason the mmc 8bit default mode fails on these boards. To rectify this, define maximum bus width supported by these boards (4bit). If max_bus_width is not defined, it is 0 by default and 8bit width support will be enabled in host capabilities otherwise host capabilities are modified accordingly. It is tested with a MMCplus card. Signed-off-by:
Abbas Raza <Abbas_Raza@mentor.com> cc: stefano Babic <sbabic@denx.de> cc: Andy Fleming <afleming@gmail.com> Acked-by:
Dirk Behme <dirk.behme@de.bosch.com> Acked-by:
Andrew Gabbasov <andrew_gabbasov@mentor.com>
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Otavio Salvador authored
Change all "#define/ifdef<TAB>" sequences into "#define/ifdef<SPACE>". Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br>
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Benoît Thébaudeau authored
The mx25pdk board supports the i.MX25 DryIce RTC (imxdi), so enable it. This allows to compile-test the imxdi driver in the mainline tree. Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
The u-boot.imx binary is generated by default, so no need to pass it in the 'make' line. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Introduce 'mx28evk_nand' target for saving environment variables into NAND. The mx28evk board does not come with a NAND flash populated from the factory. It comes with an empty slot (U23), which allows the insertion of a 48-pin TSOP flash device. Tested with a K9LBG08U0D. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by:
Otavio Salvador <otavio@ossystems.com.br>
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Otavio Salvador authored
Adds support for 'bmode' command which let user to choose where to boot from; this allows U-Boot to load system from another storage without messing with jumpers. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br>
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Otavio Salvador authored
This changes the code so in case an unkown value is passed it will return as invalid. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br>
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Otavio Salvador authored
This documents the SD card identifier so it is easier for user to spot which card number will be used, if need. Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br>
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- Mar 20, 2013
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Fabio Estevam authored
Wandboard is a development board that has two variants: one version based on mx6 dual lite and another one based on mx6 solo. For more details about Wandboard, please refer to: http://www.wandboard.org/ Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Eric Nelson authored
Nothing on the SABRE Lite board warrants a shorter than normal ARP timeout. Signed-off-by:
Eric Nelson <eric.nelson@boundarydevices.com>
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Eric Nelson authored
Signed-off-by:
Eric Nelson <eric.nelson@boundarydevices.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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Fabio Estevam authored
When loading a Freescale 2.6.35 on a mx28evk the following issue is seen: sgtl5000_hw_read: read reg error : Reg 0x00 Device with ID register 0 is not a SGTL5000 Disabling CONFIG_CMD_I2C makes the sgtl5000 probe to succeed. Mainline kernel does not show this problem. Until the real cause is not identified, disable 'CONFIG_CMD_I2C' for the time being. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Knut Wohlrab authored
The i.MX6 common timer uses the 32-bit variable tbl (time base lower) to record the overflow of the 32-bit counter. I.e. if the counter overflows, the variable tbl does overflow, too. To capture this overflow, use the variable tbu (time base upper), too. Return the combined value of tbl and tbu. lastinc is unused then, remove it. Signed-off-by:
Knut Wohlrab <knut.wohlrab@de.bosch.com> Signed-off-by:
Dirk Behme <dirk.behme@de.bosch.com> Acked-by:
Stefano Babic <sbabic@denx.de>
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Fabio Estevam authored
No need to use multi-line style comments for single-line contents. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by:
Otavio Salvador <otavio@ossystems.com.br>
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Fabio Estevam authored
Currently the following kernel hang happens when loading a 2.6.35 kernel from Freeescale on a mx28evk board: RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. Bus freq driver module loaded IMX usb wakeup probe usb h1 wakeup device is registered mxs_cpu_init: cpufreq init finished ... Loading the same kernel using the bootlets from the imx-bootlets-src-10.12.01 package, the hang does not occur. Comparing the DDR2 initialization from the bootlets code against the U-boot one, we can notice some mismatches, and after applying the same initialization into U-boot the 2.6.35 kernel can boot normally. Also tested with 'mtest' command, which runs succesfully. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Otavio Salvador <otavio@ossystems.com.br> Tested-by:
Marek Vasut <marex@denx.de>
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- Mar 15, 2013
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Albert ARIBAUD authored
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Albert ARIBAUD authored
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fabio.estevam@freescale.com authored
When building for the nitrogen boards with 2GiB the following warning happens: nitrogen6x.c:89:38: warning: integer overflow in expression [-Woverflow] 2GiB can not fit in 32-bits, so use ulong instead. Reported-by:
Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Fix the following build error when buildig nitrogen6s1g: nitrogen6x.c:89:17: error: 'CONFIG_DDR_MB' undeclared (first use in this function) nitrogen6x.c:89:17: note: each undeclared identifier is reported only once for each function it appears in Reported-by:
Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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- Mar 14, 2013
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Tom Warren authored
Pad config registers exist in APB_MISC_GP space, and control slew rate, drive strengh, schmidt, high-speed, and low-power modes for all of the pingroups in Tegra30. This builds off of the pinmux way of constructing init tables to configure select pads (SDIOCFG, for instance) during pinmux_init(). Currently, no padcfg entries exist. SDIO3CFG will be added when the MMC driver is added as per the TRM to work with the SD-card slot on Dalmore E1611. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
All other Tegra boards have their alias nodes in the .dts file Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
The pinmux code issues a warning if the caller attempts to disable the lock bit in a pinmux register, since this is impossible (once it's locked, the only way to unlock it is to reset the device/pmt controller). The I2C/DDC/CEC/USB macros expect a lock setting to be passed in, and the previous setting of DISABLE caused the pinmux table parsing code to issue the warning. Changing the lock bits in these table entries to DEFAULT (i.e. don't touch it) fixes this. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
Differences in padcfg registers (some removed, some added) between Tegra30 and Tegra114 weren't picked up when I first ported this file. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Tom Warren authored
This caused CAM_MCLK's pinmux reg to be locked out, since the table parsing code couldn't find a matching entry for VI_ALT3 and wrote garbage to the register. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
Enable a common set of partition types, filesystems, and related commands in tegra-common.h, so that they are available on all Tegra boards. This allows boot.scr (loaded and executed by the default built-in environment) on those boards to assume that certain features are always available. Do this in tegra-common.h, so that individual board files can undefine the features if they really don't want any of them. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
Various code that is conditional upon HAVE_BLOCK_DEVICE is required by code conditional upon CONFIG_CMD_PART. So, enable HAVE_BLOCK_DEVICE if CONFIG_CMD_PART is enabled. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Acked-by:
Tom Rini <trini@ti.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
This set of ifdefs is used in a number of places. Move its definition somewhere common so it doesn't have to be repeated. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Acked-by:
Tom Rini <trini@ti.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
All Tegra devices will need CONFIG_BOUNCE_BUFFER. Move it to tegra-common.h to ensure it's always set. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Tom Warren authored
Tested on my Cardhu-A04 tablet, eMMC and SD-Card work fine, can load a kernel off of an SD card OK, card detect works, and the env is now stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20). Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
Tegra30 requires the SD Bus Voltage & Power bits be set in the SD Power Control register. Tegra20 works w/o them set, but do it anyway for those SoCs as it's part of the SD spec. Also call a common board pad init routine (pad_init_mmc) in mmc_reset(), used by Tegra30 only for now. Note that Tegra20 SD/MMC HW differs enough from Tegra20 that a new compatible entry is used in the fdt compat_names/id tables. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
T30 requires specific SDMMC pad programming, and bus power-rail bringup. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
Removed SDMMC base addresses from tegra.h since they're no longer used. Added additional vendor-specific SD/MMC registers and bus power defines. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
Took these values directly from the kernel dts files. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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