Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

and move is_valid_ether_addr board file

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

rx_status on the memory is basically in LE, but needs to be handled in CPU
endian. le32_to_cpu() takes up this mission. Even if on the sane hardware,
it'll work fine.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Masami Komiya <mkomiya@sonare.it>
Cc: Lucas Jin <lucasjin@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Current driver is meant for cache coherent systems. This patch adds
flush_cache() routines to support cache non-coherent systems.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Masami Komiya <mkomiya@sonare.it>
Cc: Lucas Jin <lucasjin@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

"to = (currticks() + RTL_TIMEOUT)" has possibilities to wrap around. If it
does, the condition "(currticks() < to)" becomes invalid and immediately
leads to tx timeout error. This patch introduces the fine-graded udely(10)
loops to ease the impact of wrapping around.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Masami Komiya <mkomiya@sonare.it>
Cc: Lucas Jin <lucasjin@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Add the support of RealTek RTL8211B PHY, the RTL8211B
PHY only supports RGMII and MII mode.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

PHY less board prints out lots of "read wrong ...":
read wrong value : mii_id 3,mii_reg 2, base e0102320
read wrong value : mii_id 3,mii_reg 3, base e0102320
UEC: PHY is Generic MII (ffffffff)
read wrong value : mii_id 3,mii_reg 4, base e0102320
read wrong value : mii_id 3,mii_reg 0, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
FSL UEC0: Full Duplex
FSL UEC0: Speed 100BT
FSL UEC0: Link is up
Using FSL UEC0 device

Make this printout depend on UEC_VERBOSE_DEBUG and
remove its definition in uec_phy.c

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

actually polling for PHY autonegotiation to finish enables us to remove the
5 second boot prompt latency present on QE based boards.

call to qe_set_mii_clk_src in init_phy, and mv call to init_phy from
uec_initialize to uec_init by Joakim Tjernlund; autonegotiation wait
code shamelessly stolen from tsec driver.

also rm unused CONFIG_RMII_MODE code.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

The current TSEC driver limits MDIO access to the devices that have been configured as attached
to a TSEC MAC. This patch allows access to any PHY device on the MDIO bus through the 'mii' commands.

Signed-off-by: Michael Firth <michael.firth@bt.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

This patch extends the number of supported UECs to 4. Note that the
problem of QE thread resources exhaustion is resolved by setting the
correct number of QE threads according to Ethernet type (GBE or FE).

Signed-off-by: David Saada <david.saada@ecitele.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

qe.c: In function 'qe_upload_firmware':
qe.c:390: warning: pointer targets in passing argument 2
uec.c: In function 'uec_initialize':
uec.c:1236: warning: 'uec_info' may be used uninitialized

Signed-off-by: Dave Liu <daveliu@freescale.com>

Now that bit 29 is the USB PHY reset bit, update the Kilauea port
to remove the USB PHY reset after powerup. The CPLD will keep the
USB PHY in reset (active low) until the bit is set to 1 in
board_early_init_f().

Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: John Rigby <jrigby@freescale.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: Michael Schwingen <michael@schwingen.org>
Acked-by: Stefan Roese <sr@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

- get rid of "version" target whichdidn't really work
- make autoconf.mk depend on version_autogenerated.h to make sure
  to rebuild files as needed
- add XECHO macro to allow for silent build using "make -s"

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Oliver Weber <almoeli@gmx.de>

Currently, when CONFIG_CMDLINE_EDITING is set, bootretry doesn't work.
This patch fixes the problem.

Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>

Signed-off-by: Larry Johnson <lrj@acm.org>

Many of the SPD bytes for DDR2 SDRAM are not interpreted correctly by the
"i2c sdram" command.  This patch provides correct alternative
interpretations when DDR2 memory is detected.

Signed-off-by: Larry Johnson <lrj@acm.org>

With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]

For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.

The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.

Signed-off-by: Wolfgang Denk <wd@denx.de>

(needed for M5475EVB)

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>

boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>