- Jan 27, 2020
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Simon Glass authored
Convert the obvious uses of i2c bus speeds to use the enum. Use livetree access for code changes. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Update this driver to use the new standard enums for speed. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Patrick Delaunay <patrick.delaunay@st.com> Tested-by:
Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Update this driver to use the new standard enums for speed. Note: This driver needs to move to driver model. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Update this driver to use the new standard enums for speed. Note: This driver needs to move to driver model. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Update this driver to use the new standard enums for speed. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Update this driver to use the new standard enums for speed. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Some drivers define their own speed enums and use their own constants for speed. It makes sense to have a unified defition of the different speeds. Since many controllers have to do different things for fast/high speed, it is a good idea to have an enum for the mode. Add these as well as an enum for the address mode. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Some versions of this peripheral include a spike-suppression phase of the bus. Add support for this. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
At present the driver can end up with timing parameters which are slightly faster than those expected. It is possible to optimise the parameters to get the best possible result. Create a new function to handle the timing calculation. This uses a table of defaults for each speed mode rather than writing it in code. The function works by calculating the 'period' of each bit on the bus in terms of the input clock to the controller (IC_CLK). It makes sure that the constraints are met and that the different components of that period add up correctly. This code was taken from coreboot which has ended up with this same driver, but now in a much-different form. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Create a struct to hold the three timing parameters. This will make it easier to move these calculations into a separate function in a later patch. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Instead of passing this parameter into __dw_i2c_set_bus_speed(), pass in the driver's private data, from which the function can obtain that information. This allows the function to have access to the full state of the driver. Signed-off-by:
Sicomp_param1mon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
The i2c controller defines a few timing properties. Read these in and store them for use by the driver. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Bring in this file from Linux v5.4. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
At present the driver uses an approximation for the bus clock, e.g. 166MHz instead of 166 2/3 MHz. This can result in small errors in the resulting I2C speed, perhaps 0.5% or so. Adjust the existing code to start from the accurate figure, even if later rounding reduces this accuracy. Update the bus speed code to work in KHz instead of MHz, which removes most of the error. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Group these #defines into an enum to make it easier to understand the relationship between them. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Jun Chen <ptchentw@gmail.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Some SoCs support a higher speed than what is currently called 'max' in this driver. Rename it to 'high' speed, which is the official name of the 3.4MHz speed. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Jun Chen <ptchentw@gmail.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
We use struct clk here so really should include this header file to avoid build errors. Also switch the order of clk.h in the C file to match the required code style. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by:
Jun Chen <ptchentw@gmail.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
If a different input clock is required then the correct way to do this is with a clock driver. Don't allow boards to override IC_CLK. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Simon Glass authored
Some versions of this peripherals provide more control of the bus behaviour. Add definitions for these registers. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by:
Jun Chen <ptchentw@gmail.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Baruch Siach authored
The srdata field is unused since commit 71204e95 ("i2c: mxc: refactor i2c driver and support dm"). Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by:
Baruch Siach <baruch@tkos.co.il> Reviewed-by:
Peng Fan <peng.fan@nxp.com>
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- Jan 26, 2020
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Angelo Durgehello authored
m68k needs block cache list initialized after relocation. Other architectures must not be involved. Fixing regression related to: commit 1526bcce ("common: add blkcache init") Signed-off-by:
Angelo Durgehello <angelo.dureghello@timesys.com>
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Joel Johnson authored
This function parameter usage of load_addr was incorrectly caught in the clarifying renames of commit bb872dd9, which results in boot failures on Marvell A38x. Signed-off-by:
Joel Johnson <mrjoel@lixil.net> Patch-to: Simon Glass <sjg@chromium.org>
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https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini authored
- Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai) - Allwinner R40 Ethernet, usb phy enablement (Andre Przywara) - Sunxi auto load from 128KB MMC offset (Andre Przywara) - Orange Pi Win Ethernet phy enablement (Jernej Skrabec)
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Jernej Skrabec authored
Orange Pi Win has gigabit ethernet port, but default U-Boot configuration for that board enabled ethernet driver but didn't enable realtek phy. Fix that. Signed-off-by:
Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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Andre Przywara authored
Since commit 067e0b96 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com>
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Andre Przywara authored
The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com>
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- Jan 25, 2020
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https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini authored
Updates and fixes for ls1028a, lx2160a, ls1012a, ls1021a, ls2080a, ls1088a platforms: - lx2-rev2 pcie support, enetc related updates, layerscape-pcie fixes
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Tom Rini authored
- Enable fastboot on some MediaTek platforms - DMA enchancements - Assorted bugfixes
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Patrick Delaunay authored
This patch adds a prototype for the weak function board_mtdparts_default(). It solves one warning when compiling with W=1 on stm32mp1 board: board/st/stm32mp1/stm32mp1.c: warning: no previous prototype for 'board_mtdparts_default' [-Wmissing-prototypes] void board_mtdparts_default(const char **mtdids, const char **mtdparts) ^~~~~~~~~~~~~~~~~~~~~~ Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Eric Nelson authored
The blkcache_read() routine returns 1 (true) to indicate that a block was found in the cache and returned, or 0 if not. Signed-off-by:
Eric Nelson <eric@nelint.com>
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Shawn Guo authored
There is a typo in meerkat96 MAINTAINERS email address. Fix it. Reported-by:
Carl Gelfand <carl@novtech.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Baruch Siach authored
genboardscfg.py requires python 3.x since commit 3bc14098 ("genboardscfg.py: Convert to Python 3"). Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
Baruch Siach <baruch@tkos.co.il> Acked-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Angelo Durgehello authored
On m68k, block_cache list is relocated, but next and prev list pointers are not adjusted to the relocated struct list_head address, so the first iteration over the block_cache list hangs. This patch initializes the block_cache list after relocation. Signed-off-by:
Angelo Durgehello <angelo.dureghello@timesys.com> Reviewed-by:
Eric Nelson <eric@nelint.com>
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Vignesh Raghavendra authored
Now that arch specific dma mapping APIs take care of cache flush/invalidate, drop local cache flush operation. While at that fix dma_unmap_single() call to match new prototype Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com>
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Vignesh Raghavendra authored
Drop local dma_map_single() and dma_unmap_single() and use arch specific common implementation Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Acked-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Vignesh Raghavendra authored
Drop local dma_map_single() and dma_unmap_single() and use arch specific common implementation Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Acked-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Vignesh Raghavendra authored
Subsystems such as USB expect dma_map_single() and dma_unmap_single() to do dcache flush/invalidate operations as required. For example, see see drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request(). Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c, drivers/mtd/nand/raw/denali.c etc..) Update arch specific dma_map_single() and dma_unmap_single() APIs to do cache flush/invalidate operations, so that drivers need not implement them locally. Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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mingming lee authored
This patch includes the following: 1. Add fastboot command to erase the whole EMMC_USER 2. Add fastboot command to flash image at EMMC_BOOT1 3. Add fastboot command to erase the whole EMMC_BOOT1 4. Enale CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT for mt8518 Signed-off-by:
mingming lee <mingming.lee@mediatek.com>
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mingming lee authored
Enable EFI module. Enable fastboot. Signed-off-by:
mingming lee <mingming.lee@mediatek.com>
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mingming lee authored
Enable board_late_init and usb gadget for mt8518 Signed-off-by:
mingming lee <mingming.lee@mediatek.com>
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